柵電阻 的英文怎麼說

中文拼音 [zhàdiàn]
柵電阻 英文
[半] gate resistance
  • : 柵名詞(柵欄) railings; paling; palisade; bars
  • : Ⅰ名詞1 (有電荷存在和電荷變化的現象) electricity 2 (電報) telegram; cable Ⅱ動詞1 (觸電) give...
  • : 動詞(阻擋; 阻礙) block; hinder; impede; obstruct
  • 電阻 : (物質阻礙電流通過的性質) resistance; electric resistance (電路中兩點間在一定壓力下決定電流強度...
  1. The product of electric furnace fittings including : micro - computer program temperature control instrument 、 refractory brick ( ultra - light weight energy saving brick ) 、 resistance wire 、 electroheat belts 、 electrical heat tube 、 silicon carbide rod 、 furnace bottom plate 、 muffle tank 、 vacuum sealed fan 、 wind wheel 、 axis 、 substructure 、 bin seat 、 flat shape plate 、 box 、 panel 、 weatherstrip plate 、 return air plate 、 bin 、 connection box 、 educe rod 、 thermocouple 、 thyristor 、 porcelain pipe 、 crucible 、 furnace chamber 、 furnace frame 、 charging bin 、 substructure 、 pit furnace cover lifter framework ( sole design ) and otherwise

    爐配件產品包括:微腦程序控溫儀、耐火磚(超輕質節能磚) 、絲、帶、熱管、硅碳棒、爐底板、馬弗罐、真空密封風機、風葉、軸、底座、料筐座、扁形板、箱體、面板、擋風板、回風板、料筐、爐、接線盒、引出棒、熱偶、可控硅、瓷管、坩堝、爐膛、爐門、爐框、裝料筐、底座、井式爐蓋升降機構(獨家設計)等。
  2. In the dissertation, the effects of the air slide - film damping on the capacitive accelerometers having different slot structures which are completely or partly etched, and fabricated by the anodic bonding between silicon and glass and bulk silicon micromachining process are researched by changing the distance between the moving structure and substrate, the thickness of the structure, the width of the completely etched slot structure, the depth of the partly etched slot structure according to the two well known air slide - film damping models

    對于橫向運動的體微機械器件,其周圍空氣表現為滑膜尼。本文基於滑膜尼的兩個模型,通過改變振子與襯底的間距、振子的厚度、刻透的槽的寬度、沒有刻透的槽的深度等參數,研究了這些參數對硅?玻璃鍵合工藝製作的體硅微機械容式傳感器尼特性的影響。
  3. A model of the interface state density distribution near by valence band is presented, and the dependence of the threshold voltage on temperature, the c - v characteristics and the subthreshold characteristics are predicted exactly with this model ; the effects of s / d series resistance on the output characteristics, transfer characteristics and effective mobility of sic pmosfets are analyzed. thirdly, the output characteristics and the drain breakdown characteristics are modeled with the procedure medici. the output characteristics in the room temperature and 300 ? are simulated, and the effects of gate voltage. contact resistance, interface state and other factors on sic pmos drain breakdown characteristics are analyzed

    提出了一個價帶附近的界面態分佈模型,用該模型較好地描述了sicpmos器件閾值壓隨溫度的變化關系、 c - v特性曲線以及亞閾特性曲線;分析了源漏寄生對sicpmos器件輸出特性、轉移特性以及有效遷移率的影響;論文中用模擬軟體medici模擬了sicpmos器件的輸出特性和漏擊穿特性,分別模擬了室溫下和300時sicpmos器件的輸出特性,分析了壓、接觸、界面態以及其他因素對sicpmos擊穿特性的影響。
  4. We have done a serial of experiments to study the pam and anode grid with the aids of the measurement such as constant current charge / recharge, cyclic voltammetric measure ments, electric impedance spectrum and so on

    我們通過恆流充放、交流抗和循環伏安等實驗方法和測試手段對鉛酸池的正極活性物質和板進行了一系列的研究。
  5. A particular over - current protection and drive circuit is given, the impact of resistance between gate and emitter on gate voltage dropping is discussed, and an adjustable gate - emitter resistance circuit is put forward

    設計了過流保護驅動路,討論了射集對降壓過程的影響,並提出一種可變射集路。
  6. The low insertion loss is achieved by optimizing the transistor widths and bias voltages, by minimizing the substrate resistances, and by dc biasing the transmit and receive nodes, which decreases the capacitances while increasing the p1db

    通過優化mosfet的寬及偏置壓可以降低插入損耗。在版圖設計中通過增加襯底接觸降低襯底,從而減小插入損耗。另外,為接收和發送端提供直流偏置可以降低p1db 。
  7. The conductor-length problem was solved by forming the required length of wire into a grid pattern.

    絲長度問題,是採取將所需長度的金屬絲做成狀結構的辦法解決的。
  8. Research on surface and grain boundary passivation mechanism obtained effects of surface recombination on crystalline silicon solar cell performance and the theoretical expression of grain boundary recombination velocity. the limit ratio of short - circuit current increment for anti - reflection coating utilization on solar cells was obtained. the crystalline silicon solar cell spectral response, contact resistance and minority carrier lifetime measurement systems were established

    鈍化機理研究獲得了表面復合對不同表面摻雜濃度晶體硅太陽池性能的影響、表面和界面復合速度的理論表達式;研究得到了減反射膜對太陽池短路流增量比的極限;建立了太陽池光譜響應、極接觸和少子壽命等測試系統。
  9. We have made three - dimension electric conduct grid by hand and we have successfully used it as anode grid in lead - acid battery. this kind of three - dimension electric conduct grid can improve the utilization of pam by 7 - 9 % in different discharge current density and can reduce the plate electrochemical impedance to one tenth of the normal plate. also this kind of grid can improve the marginal reaction current density in a certain degree

    我們通過手工製作了三維導體板,並成功的應用於池的正極作為正極的板,這種三維導體板能夠在各種不同的放流密度下提高正極活性物質利用率7 9 ,能夠使池正極板的化學抗降低到普通板的1 10左右,使正極板的極哈爾濱j _程大學碩十學位論文限反應流密度略有所提高,但是這種板的耐腐蝕性能很不理想,使得所製作池的壽命很短。
  10. The effects of the operation temperatures, gate voltages, drain - source voltages and magnetic field upon the characteristic of device are analyzed in detail. coulomb blockade and single electron tunneling are observed in the devices. 3

    詳細地分析了工作溫度、壓、漏源壓和磁場對其特性的影響,觀測到明顯的庫侖塞效應和單子隧穿效應,器件的工作溫度可達到77k以上。
  11. 2. the input stages of the ccii and the operational amplifier in transimpedance implifier are realized with folded cascode amplifier to reach high cmrr, large open loop gain and low offset

    2 .為了提高儀表放大器的源抑制比,並得到大的開環增益,相對低的失調等性能,流傳輸器的輸入級和跨放大器中運算放大器輸入級均採用折疊共源共放大器。
  12. The thesis has done the widespread investigation and study to the domestic and foreign ’ s technologies of analogy low voltage and low power, and analyzes the principles of work, merts and shortcomings of these technologies, based on the absorption of these technologies, it designs a 1. 5v low power rail - to - rail cmos operational amplifier. when designing input stage, in order to enable the input common mode voltage range to achieve rail - to - rail, it does not use the traditional differential input pair, but use the nmos tube and the pmos tube parallel supplementary differential input pair to the structure, and uses the proportional current mirror technology to realize the constant transconductance of input stage. in the middle gain stage design, the current mirror load does not use the traditional standard cascode structure, but uses the low voltage, wide - swing casecode structure which is suitable to work in low voltage. when designing output stage, in order to enhance the efficiency, it uses the push - pull common source stage amplifier as the output stage, the output voltage swing basically reached rail - to - rail. the thesis changes the design of the traditional normal source based on the operational amplifier, uses the differential amplifier with current mirror load to design a normal current source. the normal current source provides the stable bias current and the bias voltage to the operational amplifier, so the stability of operational amplifier is guaranteed. the thesis uses the miller compensate technology with a adjusting zero resistance to compensate the operational amplifier

    本論文對國內外的模擬低壓低功耗技術做了廣泛的調查研究,分析了這些技術的工作原理和優缺點,在吸收這些技術成果基礎上設計了一個1 . 5v低功耗軌至軌cmos運算放大器。在設計輸入級時,為了使輸入共模壓范圍達到軌至軌,不是採用傳統的差動輸入結構,而是採用了nmos管和pmos管並聯的互補差動輸入對結構,並採用成比例的流鏡技術實現了輸入級跨導的恆定;在中間增益級設計中,流鏡負載並不是採用傳統的標準共源共結構,而是採用了適合在低壓工作的低壓寬擺幅共源共結構;在輸出級設計時,為了提高效率,採用了推挽共源級放大器作為輸出級,輸出壓擺幅基本上達到了軌至軌;本論文改變傳統基準源基於運放的設計,採用了帶流鏡負載的差分放大器設計了一個基準流源,給運放提供穩定的偏置流和偏置壓,保證了運放的穩定性;並採用了帶調零的密勒補償技術對運放進行頻率補償。
  13. The resonance network is connected to the gate, then the output and input matching network is designed to satisfy the oscillation criteria. then harmonic balance method is used to analysize and optimize the output power and phase noise. to minimize the load pulling effect a buffer amplifier is designed to isolate the oscillator and the load

    本文在場效應管fet極上加上諧振網路(諧振網路是通過cst模擬得到的,它是串聯反饋迴路,介質工作在te01模,對于其後的fet ,它又相當於一個帶濾波器) ,然後設計輸入輸出匹配路,使路結構滿足起振條件,之後繼續用諧波平衡法模擬和優化,使振蕩器輸出功率合適,相位噪聲很低。
  14. Through the flexural failure tests, it is show that the measured results of fbg sensor and strain gauge are nearly same

    試驗梁通過彎曲破壞試驗比較布拉格光傳感器與應變片的測試結果。
  15. The influence of metallic mesh packing block on radar wave shielding is only dependent on packing block material ’ s surface electric resistance, independent on other factors of material. the less surface electric resistance is, the better metallic mesh ’ s shielding effect is

    而且金屬網襯層對雷達波屏蔽作用的影響只與襯層材料的面有關,與材料其它因素無關,面越小,網的屏蔽效果越好。
  16. In this test a new method was adopted to check and test the behaviors of structures by using optical fiber bragg grating sensors which realize the synchronous measurements with electricity - resistance gauges. the results show that optical fiber bragg grating sensors has boundless prospects for checking in civil engineering

    試驗中,還採用應變計和光纖布喇格光傳感器在加載過程中對加固構件進行同步測量,結果表明光纖布喇格光傳感器是應用於土木工程檢測的很有前途的新技術,有著廣泛的應用前景。
  17. Iit is widely used in petrochemical, petroleum, pharmaceutical, metallurgical, power wastewater treatment, ocean engineering and environment protecion industries, as floorboards in corrosive environment, stairs, drain covers, iperation platform corridors and safety balustrade in electrical installations

    玻璃鋼格具有優良的耐腐蝕,燃、防滑、絕緣性能,並以其輕質、高強等特點,廣泛地應用於石化、力、食品加工、廢水處理、造紙、海洋工程以及環保等領域。
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