模塊化轉換器 的英文怎麼說

中文拼音 [kuāihuàzhuǎnhuàn]
模塊化轉換器 英文
modular converter
  • : 模名詞1. (模子) mould; pattern; matrix 2. (姓氏) a surname
  • : 名詞(古時佩帶的玉器) penannular jade ring (worn as an ornament in ancient china)
  • : 轉構詞成分。
  • : 動詞1. (給人東西同時從他那裡取得別的東西) exchange; barter; trade 2. (變換; 更換) change 3. (兌換) exchange; cash
  • : 名詞1. (器具) implement; utensil; ware 2. (器官) organ 3. (度量; 才能) capacity; talent 4. (姓氏) a surname
  • 模塊 : camac module,camac
  • 轉換器 : -ad
  • 轉換 : change; transform; convert; switch
  1. The three - order modulator has a 2 - 1 cascaded structure and 1 - bit quantizer at the end of each stage, the modulator is implemented with fully differential switched - capacitor circuits. and then, the discussion will begin by exploring the design of various circuit blocks in the modulator in more detail, i. e., ota, switched - capacitor integrator, quantizer, two - phase non - overlapping clock signal, etc., at the same time, these circuits will be simulated in spectre and hspice. at last, the whole cascaded modulator will do behavioral level simulation by matlab soft and simulink toolbox

    本論文中,首先介紹的各種參數的意義,以及一階sigma - delta調制和高階sigma - delta調制的原理;給出解決高階單環sigma - delta調制不穩定性的方案,引入級聯結構調制,特別針對級聯結構調制中的失配和開關電容積分的非理想特性進行詳細的討論;本設計的sigma - delta調制採用2 - 1級聯結構和一位量,調制採用全差分開關電容電路實現;同時對整個調制的各個進行了電路設計,包括跨導放大、開關電容積分、量、兩相非交疊時鐘等,並利用hspice和spectre擬工具對這些電路進行擬測試;最後,利用matlab軟體和simulink工具對整個級聯調制進行行為級擬。
  2. Through analysising the characteristics of the power system with floating neutral point deeply, the paper puts forward a new plan of single - phase to ground fault line selection on the base of s ' s signal injecton method and gives the hardware and software design. in this design, the high speed sampling and data processing is carried out through using dsp processor ; the large electrice current is drived through the application of a high - performance audio power amplifier and transformer ; the communication between host computer and detectors is realized through rs485 bus technology ; the difference multilevel frequency - selected amplifier is designed and the feeble signal of space is sampled on the base of the theory of magnetic induction ; the interface between dsp and exterior chip and rs485 interface logical is designed through using fpga ; the using of lcd module and keyboard interfacing chip makes the interface between human and machine ; the programme of host computer and detectors is designed through using blocking design method

    在本設計中,採用高速的dsp處理,實現了對故障特徵信息的高速採集與處理;採用大功率的功放晶元與變壓配合的方法,實現了大電流信號的驅動輸出;採用485總線技術,組建了裝置主機與多探測之間的主從式通訊網路,實現了多干擾條件下裝置主機與多探測的可靠通訊;設計了差分式多級選頻放大電路,採用磁感應的方法實現了對空間微弱信號的接收;利用fpga技術,實現了控制與多外設的介面及數字信號的串並;採用了先進的lcd液晶顯示及鍵盤介面晶元,設計了人機信息交互的介面;採用了的軟體設計方法,開發了裝置主機及探測的軟體程序。
  3. His message is that construction of an open, standardized, modular hardware platform generic, and broadband modules and antennas as close as possible to a / d / a

    他的中心思想是:構造一個開放性、標準的通用硬體平臺,並使寬帶數和數盡可能靠近天線。
  4. During the design of vxi - bus serial controller module, the functions of vxi - bus including time - sequence for vxi interface, resource management, interrupt process, bus arbitration, are accomplished. to advance the performance and stability, the fpga technic is used to implement the kerneled code including serial bus time - sequence switching to vxi interface time - sequence, the uart, the parameterized baud generator and “ pipeling frame ”. the handle type of data transfer bus for vxi - bus is researched thoroughly, and the format of serial data transfer is designed

    在vxi總線串列控制設計中,實現了vxi總線控制的基本功能,包括vxi總線介面時序、總線仲裁、超時處理等;同時利用先進的fpga技術實現了串列總線時序向vxi總線時序的、通用異步收發( uart ) 、參數波特率發生、流水線結構等功能;在設計中還深入研究了vxi總線數據傳輸的各種操作類型,制定了串列數據傳輸的編碼格式。
  5. Millions. at present, these are more than 500 employees in our company ( including over 10 medium & high grade managerial personnel ), and it occupies over 5, 000m2, which is an enterprise specilized in the production of jacks, merging managerial modernization, marketing globalization, intelligent office operation and comprising manufacturing, sales, technical development and design into the whole. now we have telephone jack, computer jack, ft2 clipped connection module, telephone wall module jack, net exchanger, rj11 and rj45 connector and so on over 200 products

    管理人員數十人,工廠佔地面積5 , 000平方米,是一家管理現代,產品營銷全球,辦公操作智能以及集技術開發、設計、生產、銷售於一體的專業接插件生產企業。公司現有電話、電腦插座、通訊卡接、電話接線盒、網路及rj11 、 rj45連接頭等200多種產品。
  6. In the encoder, if the incoming block is intercoded, no dct coefficients are computed after the eob of the incoming blocks is performing a dct

    在該編碼部分,假如輸入區是交互編碼式,則僅需對輸入離散餘弦進行解量及再量之程序,無需其它任何離散餘弦及反向離散餘弦之運算。
  7. Further, in the encoder when the incoming block is intercoded, an algorithm is applied to predict which dct coefficients may become zero after a subsequent quantization operation, and only dct coefficients that may not become zero are computed in performing the dct

    再者,在該編碼中,當輸入區是交互編碼式,則應用一種計算方法來預測經由后續的量運算后那一些離散餘弦系數可能變為零,而只有那些可能不會變為零的離散餘弦系數會用在執行離散餘弦的計算中。
  8. The paper also introduces the design of the high - voltage test and leak test instruments and the key unit circuit such as rms measure, ad conversion, hardware protect. the paper explores the high - voltage ac power further

    還具體介紹了耐壓泄漏測試儀的工作原理及具體設計方案,採用了軟硬體的設計方法,加快了儀的開發進度,對其中主要電路:有效值測試、 ad和硬體保護電路進行了介紹。
  9. To realize the research purpose of the system, this paper take full advantage of some advanced technology. product structure and configuration management related to design and manufacture is the foundation of the system ; the modularized design of the product and the standardization and versatility of the components are the premise of the customer - oriented product custom ; the transform of product modal from custom product to product structure and configuration management asks for the help of the thought and method of the quality function deployment ( qfd ). the widest customer - oriented form is internet technology, and its kem is dynamic web service

    為了實現系統的研究目的,充分利用了當前一些先進的技術:與設計和製造相關的產品結構與配置管理是本系統的基礎;產品設計的以及零部件的標準和通用是面向客戶的產品定製的前提;客戶定製產品構型與產品結構與配置管理當中的產品構型之間的,藉助了質量功能配置( qfd )的思想和方法;面向客戶的最廣泛的形式是internet技術,其核心是動態web服務
  10. I designed both hardware and software to develop the multi - channel analyzer, of which the key is the pc / 104 embedded computer. in a word, it has five traits as follows : ( 1 ) the key of apparatus is the pc / 104 embedded computer ; ( 2 ) on the hardware, we introduce the high - speed a / d conversion component - max191 to improve the mca ' s conversion speed and meet the demand on the spot ; ( 3 ) adopting high frequency module of electrical source to reduce its volume. ( 4 ) the mca consumes low power no more than 3. 9 watt

    以國土資源部項目為依託,以pc 104嵌入式微機為平臺,完成了小型、低功耗能譜採集系統,特點是: ( 1 )以pc 104嵌入式微機為平臺,實現了採集系統微機; ( 2 )採用高速低功耗a d件maxl91 ,與現有的mca相比,提高了速度,降低了mca的功耗; ( 3 )採用高頻電源,減小了採集系統的體積; ( 4 )整機功耗低,小於3 . 9w ; ( 5 )儀重量輕。
  11. The serializer and deserializer moduls in the ftlvds chip are designed by the way of standard cell design approach. the paper emphatically discusses the tradeoff and the implementation of several clock synchronization modes and circuit structures, and makes a lot of verilog simulation and verification on the circuits designed

    串並串列和解串列採用標準單元的方法設計,論文討論了對幾種時鐘同步式以及串並電路結構的權衡和實現,並對所設計的電路結構進行了verilog擬驗證。
  12. This paper also present a method that reduces the computational requirements of the encoder, while still upholding picture fidelity and remaining compatible with the h. 263 bitstream standard. often a substantial number of inter - macroblocks in the encoder are reduced to all - zero values after quantization. we introduced a method of predicting when those macrobolcks will quantize to zeros, which in turn allows us to eliminate the computation that would normally be required for those macroblocks

    在編碼中宏經過dct變和量后,總有一定數量的宏的系數全為零,因此在進行dct前先進行預測,將那些預測系數全為零的宏提前查找出來,然後將系數全為零的宏azq ( all - zeroquantizedcoefficients )直接送到熵編碼進行可變長編碼。
  13. But the cost of the testing system limit the further intelligent development, and " a / d convert " is the key part of this system. in order to solve this conflict problem this paper gives a method - by adding a few components to at89c2051, and using it ' s internal converter we have designed a a / d module with the function of microprocessor

    但是檢測系統的成本在一定程度上限制了傳感向智能方向發展,而檢測系統的關鍵部件就是「裝置」 ,為了解決這一問題,本文利用具有極高性能價格比的at89c2051單片機本身帶有的內置比較,通過外接少量元件,設計出了具有微處理功能的a d
  14. The meter ( which is called pccm2002 for short ) is designed on the basis of mcs - 51 single - chip microcomputer technique. the hardware is composed of single - chip microcomputer module and electrochemical module. the single - chip microcomputer module can be divided into five parts, cpu circuit, a / d and d / a circuit, peripheral memory circuit, i / o interface circuit, distributing address circuit ; the electrochemical module is made up of potentiostatic circuit, galvanostatic circuit, potentiostatic - galvanostatic ( p - g ) conversion circuit, signal measuring circuit. the software of the meter is edited by c51 language, it is well - structured and module. all program modules have been linked into an executable files after compiled separately, then copy to eprom

    恆電位控制下的恆電量智能腐蝕監測儀採用基於mcs - 51單片機技術的智能設計,儀硬體由單片機系統和電學介面組成,單片機系統包括cpu電路,片外存貯擴展電路,數和數( a d和d a )電路,輸入輸出( i o )介面電路,地址分配電路,各電路通過系統總線交信息;電學介面主要由恆電位電路,恆電流電路,恆電位-恆電流( p - g )電路,信號放大與採集電路組成。
  15. Also, the fully optimized code is converted into the appropriate machine code via a robust, table - driven back - end module

    另外,完全優的代碼通過健全的由表驅動的後端為相應的機代碼。
  16. In the dissertation , we discribe the implementation of large capability video data acquisition system based on pci bus of computer 。 the system is composed of data acquisiton card and corresponding software 。 the data acquisiton card include two acquisition channels , 8 - bit digitization at rates up to 13. 5mhz 。 frist , the architecture of the video data acqusition system is studied 。 then , the function and implementation methode of each module are introduced in detail 。 the control module of the video data acqusition card is implemented by using of the isp technology of cpld and vhdl programming technology 。 the a / d converter used assembler to implement the initialazation programe 。 and the double buffer technology is used for large capability data acqusition. because a contiously large memory is difficult to apply in windows operating system 。 finally we use broland c + + to introduced the devleoping procedure of drivers 。

    在實際的研製過程中,利用cpld的在系統可編程( isp )技術和基於vhdl語言的可編程邏輯件設計技術實現了視頻數據採集卡的控制。在視頻的a / d,用匯編程序擬i2c總線對初始a / d晶元。針對大容量數據採集,採用了雙緩沖技術解決wndows操作系統下難以申請到大容童連續內存的間題。
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