模擬設計語言 的英文怎麼說

中文拼音 [shèyán]
模擬設計語言 英文
emulation design language
  • : 模名詞1. (模子) mould; pattern; matrix 2. (姓氏) a surname
  • : 動詞1. (設計; 起草) draw up; draft 2. (打算; 想要) intend; plan 3. (模仿) imitate
  • : Ⅰ動詞1 (設立; 布置) set up; establish; found 2 (籌劃) work out : 設計陷害 plot a frame up; fr...
  • : Ⅰ動詞1 (計算) count; compute; calculate; number 2 (設想; 打算) plan; plot Ⅱ名詞1 (測量或計算...
  • : 語動詞[書面語] (告訴) tell; inform
  • : Ⅰ名詞1. (話) speech; word 2. (漢語的一個字) character; word 3. (姓氏) a surname Ⅱ動詞(說) say; talk; speak
  • 模擬 : imitate; simulate; analog; analogy; imitation; simulation模擬艙 boilerplate; 模擬電路 [電學] circ...
  • 設計 : devise; project; plan; design; excogitation; layout; layout work; styling
  • 語言 : language
  1. Applying method of system ' s analysis integration definition method ( idef ) to the functional and structural analysis of net - nc operating platform, five modules of function have been abstracted, the charts of functional models of these modules have been designed ; 3. developing net - nc operating platform software by the object - oriented programming language delphi 5. 0, having realized information manage of the net - nc operating platform ; 4. integrating serial communication module and processing simulation module into net - nc operating platform, and fatherly functional integrate will go on ; 5

    在課題研究中,主要做了以下工作:研究了網路數控操作平臺的結構式,將其功能劃分為信息集成和功能集成;運用idef系統分析方法對平臺信息流進行研究,劃分出五大功能塊,繪制出塊功能型圖,為信息集成做好準備工作;運用面向對象的程序delphi5 . 0開發操作平臺軟體,實現操作平臺的信息管理;實現了串口通信塊、加工塊與操作平臺的集成,為進一步的功能集成提供了思路和方法;網路數控操作個臺的研究與實現提出了將遠程視頻技術集成入網路數控系統的方案。
  2. The whole system is divided into several modules and each module is connected by signals, which based on the arithmetic of spwm and the requirement of design. the module design is to design inner circuit structure of each module and uses verilog language to code the synthesizable and reusable code. the functional stimulation uses the nc - verilog of cadence

    系統是基於spwm的實現演算法和指標要求,對系統劃分塊和對各個塊進行信號連接;每個塊內部電路結構,並用verilog編寫可綜合可復用代碼;功能使用的工具是cadence的nc _ verilog ,首先對每個塊進行功能通過之後,把所有塊代碼組合在一起,構成整個系統代碼,在外部輸入埠加激勵,對整個系統進行功能
  3. The main process includes following : system design, module design, function simulation, time simulation and hardware verification. the whole system is divided into several modules and each module is connected by signals, which based on the arithmetic of uart and the requirement of design. the module design is to design inner circuit structure of each module and uses verilog language to code the code

    系統是基於uart的實現演算法和指標要求,對系統劃分塊以及各個塊的信號連接;出每個塊的功能,並用verilog一hdl編寫代碼來實現塊功能;功能和時序使用的工具是以dence的nc _ veri109 ,首先對系統的每個塊進行功能和時序通過之後,將整個系統的代碼在外部的輸入埠加上激勵,對整個系統進行功能和時序;硬體驗證是用fpga對系統進行了功能驗證。
  4. Additionally, in the analysis and design phases, the system modeling is accomplished by means of uml. in terms of the process of object - oriented analysis, object - oriented design, and object - oriented programming, the hierarchy analysis of simulation system is carried through based on oos ( object - oriented simulation ), and the simulation framework design is completed. some key problems brought by the expandability needs, are solved by using the class mechanism, inheritance mechanism, overloading mechanism and dynamic memory allocation such advanced technologies of c + + programming language

    此外,運用uml統一建對軟體進行分析與階段的系統建,按照面向對象分析、面向對象、面向對象程序的步驟,進行了基於oos的系統層次分析,完成了框架,並且充分利用面向對象程序c + +的類機制、繼承機制、重載機制和動態內存分配等先進技術解決了軟體擴展性要求所帶來的幾個關鍵問題。
  5. ( 4 ) we design the simulator by visual basic. this work is the most essential and complex work

    4 )介紹了器的及製作過程,利用算機高級程序visaulbasic進行,編制程序。
  6. 3 ) design switch system using eda based on the result of a11alysis. because the function of switch system is very complicated, some modules are designed by schematics directly, most modules are designed by verilog hdl using eda technology, synthesized by the synopsys software. at last a high speed atm switch system is designed, including voq as input buffer strategy dpa cell scheduling algorithm and crossbar switch fabric

    在前面分析的基礎上根據目前的條件,對一個空分交換系統各塊進行前端,由於交換系統的功能復雜,我們一部分將採用直接畫原理圖的方法進行,大部分將採用集成電路自動化的方法進行,即採用硬體verilog ? hdl進行,用synopsys軟體對進行綜合,生成線路圖,然後作門級電路
  7. Based above it uses the visual basic6. 0 on the windows plat develop the double parameters abs dynamic simulation and emulator

    在此基礎上,在windows平臺上利用visualbasic6 . 0程序開發了雙參數abs動態系統。
  8. The dynamic predigesting model for passive isolation of flexible base system was established, and the four - pole parameters and machinery impedance methods were adopted to analyse the system, the expression of the responsibility and power flow transmissibility was deduced. by means of the matlab programming language, the responsibility and power flow transmissibility were simulated. proposed the vibration contrl method of optimizing system parameters. the methods proposed in this dissertation, can meet the requirement of decreasing vibration and noise for flexible base, and have some practicability and reference value

    對柔性基礎被動隔振系統進行了力學建簡化,並採用四端參數和機械阻抗方法對其進行分析,推導出其響應比和功率流傳遞率的表達式,並利用matlab程序對響應比和功率流傳遞率進行了。提出了以優化系統參數為措施的振動控制方法。本文所提出的方法,能夠滿足柔性基礎減振降噪的要求,具有一定的實用性和參考價值。
  9. Vpml is a discipline and process - independent model description language of electro - mechanic products in vpbcd. vpml has strong abilities on geometry and behavior modeling, and it provides coherent model description for cooperative design, concurrent design, and confederate simulation of multi - discipline systems

    Vpml是一種獨立於領域與過程的面向機電產品概念的虛原型型描述,具有較強的幾何和行為建能力,為多領域系統在概念階段的協同、并行及聯合過程提供一致的型描述。
  10. In this paper we dissertate the common structure cross forms and excavating methods of highway double - arc tunnel home and abroad at the first part, and study common simulation methods of tunnel construction afterwards. based on the method of reversing and releasing the stress, and combined with the capacity of simulating continuous construction of ansys programme, we come up with the thought of using the method of applying virtual support force to release the stress step by step to realize the step - by - step release of initial stress during the tunnel construction simulation. with the help of design language of ansys, we develop a command to apply the virtual support force

    探討了應用平面應變型進行隧道施工過程的常用方法,在「反轉應力釋放法」的基礎上,結合ansys軟體可以連續施工的特點,提出利用「施加虛支撐力逐步釋放法」來實現隧道施工過程中地應力隨工序的逐步釋放的思路,並且利用ansys的apdl,開發出施加虛支撐力的命令,實現了施工過程中應力的逐步釋放,從而找到了一種隧道施工過程的好方法。
  11. Based on the common - purpose flat of ansys, the macro file, which can simulate the concrete pouring, is compiled in this paper by using ansys parametric design language ( apdl ) and many internal functions of ansys

    本文的工作就是在ansys程序的通用平臺上,通過ansys參數( apdl )以及多種ansys內部函數,編制能實現混凝土施工的宏,在這個宏的控制下,由ansys程序進行施工
  12. Finally, based on the common - purpose flat of ansys, the macro file, which can simulate the temperature field and the thermal stress field, is compiled in this paper by using ansys parametric design language ( apdl ) and many internal functions of ansys

    最後在有限元分析程序ansys的通用平臺上,通過參數( apdl )以及多種ansys內部函數,編制宏命令來控制ansys程序進行施工溫度場和溫度應力場
  13. Realizes the longitudinal relationship between models by using object - oriented programming language ; 2 ) sets forth the function and software design in detail, and analyzes entities of the system. realizes the randomness of traffic flow and constructs vehicle arriving model, vehicle movement model on road segments and vehicle movement model on intersections, so completes the kernel part of traffic simulation ; 3 ) uses 3d modeling software - multigen creator and real - time simulation software - vega to build up the 3d virtual environment of microscopic traffic simulation, and drives dynamic entities such as driver - vehicle units and traffic lights in static scenes ; 4 ) studies the characteristic of checkerboard system of street layout, analyzes and decomposes the system to deduce a certain simplification method. and researches the application of urban traffic route choice

    論文主要工作如下: 1 )利用面向對象技術分析交通系統型之間的橫向關系和交互作用,研究靜態實體的狀態變化和動態實體的運動規律;利用面向對象的程序實現系統中型的縱向關系; 2 )詳細闡述交通微觀系統的功能、軟體,分析系統中的實體;實現車流的隨機性,建立車輛的到達、車輛在路段上的行駛過程、車輛通過交叉口的行駛過程等型,完成交通的核心內容; 3 )利用三維建軟體multigencreator和實時軟體vega建立交通狀態微觀的三維虛環境,在靜態視景中驅動駕駛員-車輛單元、信號燈等動態實體; 4 )研究棋盤式道路格局的特點,從理論上分析並分解系統,得到一定的簡化依據,進一步研究城市交通路線選擇的應用。
  14. The vxibus c - size and i, q channels are employed in this module design, and the sampling rate in each channel reaches 500mhz. the memoty deep of the system is 2mb each channel and cpu is high - speed embedded cpu ( powerpc ). the timing and logic function are fulfilled by fpga. after the disscusion of signal adjusted, the detailed scheme of this module design have been showed. in this design, there is much logic function design, and it is very strict with the hardware language program. so the basic flow of hardware program design and several very important methods of high speed logic function design, which is described by vhdl, are introduced. also, expatiated the inner modules structure of fpga for forepart circuit, the keystone and difficulties of the design. the design of high - speed pcb is another difficuty of realizing high - speed data acquisition system, and it is very important. the timing simulating results of several pivotal modules are depicted. high - speed signal paths are terminated to match the characteristic impedance. the design undergoes integrity analysis and software simulation

    在本塊的中,有著大量的邏輯,對硬體程序的編寫要求比較高,因此,文中介紹了硬體程序的基本流程,以及幾種基於vhdl硬體在高速邏輯中非常重要的方法。同時闡述了本的前端fpga的內部塊結構,的重點、難點,並給出了重要塊的時序結果。高速pcb的也是目前實現高速數據採集系統的難點和重點,文中詳細的闡明了高速pcb中的注意點,以及作者在塊時的經驗和心得。
  15. Its driver control logic was realized by means of digital integrated circuit in which the pld chips utilized as the carrier. the vhdl, which is the ieee standard design language of integrated circuit, is used as the behavior description language. the compilation, synthesis, simulation and programming are fulfilled in the maxplusii

    的重點是驅動板,其驅動控制邏輯以pld晶元為載體通過數字集成電路方式實現,控制邏輯的功能是用ieee標準的集成電路vhdl作為行為描述,在maxplus武漢科技大學碩士學位論文環境中進行編譯、綜合、和晶元編程。
  16. Finally, complete the system and realize all functions. based on this system, a discrete event system model using general purpose simulation system - gpss is established to validate and evaluating home automation system ' s reliability and performance. according, a lot of experiments, many stimulant examinations are done, and obtained a series of data

    在此基礎上,為了驗證家庭自動化系統的可靠性和評判其通信性能,使用通用系統? ? gpss對所的家庭自動化網路系統建立了離散事件系統型,並利用此型進行了試驗,獲得了一系列的試驗數據。
  17. Assemble design is very important as a part of bridge crane design. as a visual reality technology applied in design and manufactual field, visual assemble technology has been gained quiet great development. some visual assemble system has been applied in industry. the research in this paper is combining vr and cad technology, to develop a special design system for bridge crane. in the study, we choose a advanced 3 - d cad software - solidworks to modeling the crane, and use an object oriented computer language - visual basic for secondary development of solidworks by its api function and ole interface. in this paper, it will introduce the crane ’ s automatic assembly and collision detection function of design system. the system program is written in visual basic and hanged to solidworks flat roof. so, it seems solidworks runs its own function when we run the program

    本文的研究工作將虛現實技術與三維cad技術相結合,研究橋式起重機的虛自動裝配及裝配中的干涉檢查。在此研究中,作者選用先進的三維cad軟體平臺- solidworks ,進行起重機的建;並運用面向對象的- visualbasic ,利用solidworks的api函數和ole介面對其進行二次開發,開發出起重機小車的創新虛裝配和干涉檢查系統。此系統是通過vb編程,在solidworks軟體平臺上外掛系統程序,程序的運行就如同solidworks調用自身功能一樣,來實現功能。
  18. Using the sdl design language, the scheme is simulated and the result can meet the requirement of the high reliability for the data transfer in a mobile communication environment

    作者利用sdl程序對該簡化方案進行了結果基本滿足移動環境下的對數據傳輸的高質量要求。
  19. On the basis of the model, using unified model languish ( uml ), we design and develop the simulating system. by adopted object oriented and component based design theory, using dynamic library link technique under windows programming, the system was compacted in structure and run faster

    型基礎上,運用面向對象和面向組件的思想,對電子調速系統進行軟體開發,系統採用統一( uml ) ,進行可視化系統塊構造。
  20. We choose the max _ log _ map decoding algorithm and use the technology of altera and its cyclone2 devices as the fpga design scheme according to all the factors. taking advantage of the technology of fpga, the means, called “ top - down ” and “ down - top ”, is applied in the design of fpga in this paper

    在綜合考慮方案的綜合性能、復雜程度、系統規、系統延時和成本等各項因素后,本次選擇了altera公司的cyclone2器件來完成turbo碼譯碼演算法( max _ log _ map )在硬體上的
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