溝道摻雜 的英文怎麼說

中文拼音 [gōudàochānzá]
溝道摻雜 英文
channel doping
  • 溝 : 名詞1 （挖掘的水道或工事） channel; ditch; gutter; trench 2 （淺槽;似溝的窪處） groove; rut; furr...
  • 道 : Ⅰ名詞（道路） road; way; route; path 2 （水流通過的途徑） channel; course 3 （方向; 方法; 道理） ...
  • 摻 : 摻動詞[書面語] （持; 握） hold
  • 雜 : Ⅰ形容詞（多種多樣的; 混雜的） miscellaneous; varied; sundry; mixed Ⅱ動詞（混合在一起; 攙雜） mix; blend; mingle
  • 摻雜 : 1. mix; mingle2. doping; inclusion; addition; adulteration
  1. Based on the hydrodynamics energy transport model, the degradation induced by donor interface state is analyzed for deep - sub - micron grooved - gate and conventional planar pmosfet with different channel doping density. the simulation results indicate that the degradation induced by the same interface state density in grooved - gate pmosfet is larger than that in planar pmosfet, and for both devices of different structure, the impact of n type accepted interface state on device performance is far larger than that of p type. it also manifests that the degradation is different for the device with different channel doping density. the shift of drain current induced by same interface states density increases with the increase of channel do - ping density

    基於流體動力學能量輸運模型，對溝道雜質濃度不同的深亞微米槽柵和平面pmosfet中施主型界面態引起的器件特性的退化進行了研究.研究結果表明同樣濃度的界面態密度在槽柵器件中引起的器件特性的漂移遠大於平面器件，且電子施主界面態密度對器件特性的影響遠大於空穴界面態.特別是溝道雜質濃度不同，界面態引起的器件特性的退化不同.溝道摻雜濃度提高，同樣的界面態密度造成的漏極特性漂移增大
  2. The source drain extension ( sde ) structure and its reliability are thoroughly studied. first, it is shown that the sde structure can suppress short channel effect effectively and the parasitic resistance at the sde region has an effect on performance. it is proposed that increasing the dose condition in the sde region can reduce the parasitic resistance and should be adopted to achieve high performance for deep submicron devices

    本文對深亞微米源漏擴展mos器件結構及其可靠性進行了深入研究，首先通過模擬驗證了源漏擴展（ sde ）結構對短溝道效應的抑制， sde區寄生電阻對器件性能的影響以及sde區摻雜濃度的提高對器件性能的改善，指出了器件尺寸進一步減小后，提高源漏擴展區摻雜濃度的必要性。
  3. The model of threshold voltage solves the problems of nonuniformly doped channel, short channel effect, implantation for adjusting threshold voltage, edge capacitance of gate, etc. not only the model can be used in ldmos, but it can perfectly describe the short channel effect of threshold voltage for all other mos devices

    其中，閾值電壓模型解決了溝道非均勻摻雜、短溝道效應，調閾值注入，柵邊緣電容等問題。該模型不僅適用於ldmos ，也可以很好地描述所有的mos器件閾值電壓的短溝道效應，嚴格證明了短溝道效應會引起閾值電壓的減小。
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