狀態機器 的英文怎麼說

中文拼音 [zhuàngtài]
狀態機器 英文
machine state
  • : Ⅰ名詞1 (形狀) form; shape 2 (情況) state; condition; situation; circumstances 3 (陳述事件或...
  • : 名詞1. (形狀; 狀態) form; condition; appearance 2. [物理學] (物質結構的狀態或階段) state 3. [語言學] (一種語法范疇) voice
  • : machineengine
  • : 名詞1. (器具) implement; utensil; ware 2. (器官) organ 3. (度量; 才能) capacity; talent 4. (姓氏) a surname
  • 狀態 : status; state; condition; state of affairs: (病的)危險狀態 critical condition; 戰爭狀態 state o...
  • 機器 : 1. (用來轉換或利用機械能的機構) machine; machinery; engine 2. (引申為機構) apparatus; organ
  1. Fsmail adopts and implements the asynchronous event driven mechanism, with all those network i / o operations in the server working under the non - blocking style ; accomplishes object - oriented heap with the dynamic array, adapted to any type of data ; adopts the multi - queue scheduling mechanism based on a fsm, easily to fulfill the extentions of delivery funtions ; fulfills the non - blocking domain name resolvement mechanism and the caching of the resolved results ; implements the non - blocking user database management and the caching of the user data recently accessed ; uses the unified memory pool management, avoiding the memory leakage and improving the performance of the fsmail server ; lastly, implements the log management server based on the c / s mode, eliminating the inconsistency of the logging metadata and being adapted to any kind of application logging

    Fsmail採用並實現了異步事件驅動制,所有網路i o的實現使用了非阻塞方式;以動數組實現了基於面向對象的堆隊列,屏蔽了堆數據的非一致性;使用了基於有限的多隊列郵件調度制,為后續版本的擴展性提供了良好的介面制;服務內部實現了非阻塞的域名解析制,並實現域名地址緩存;實現了非阻塞的用戶數據庫管理模塊,並實現用戶數據緩存;使用了統一的內存池管理制,既防止了內存泄漏,又提高了服務的性能;最後,還實現了基於c s模式的日誌管理服務,屏蔽了日誌數據元的非一致性。
  2. The design of each functional module, including the bridge selected module, mlb slave state machine, buffer, ahb master state machine, arbiter. 4

    各功能模塊的設計,包括橋選擇單元、 mlb從、緩沖區、 ahb主,仲裁; 4
  3. This dissertation studies the reuse methodology in the verification, analyzes the intellectual property standalone verification platform, discusses the design methods of bus function model and bus monitor in the reusable function verification platform, investigate the difference in the reusability of the implementation mode of task - based and state machine - based bus function model and present the reusability design rules in the bus monitor

    在此基礎上,分析了ip單獨驗證平臺,並討論了該驗證平臺中總線功能模型和總線監視的設計方法,研究了基於任務和基於兩種總線功能模型的實現方式在可重用性方面的區別,並提出了總線監視的可重用性設計規則。
  4. Further investigated and analyzed composition structure and flow data that dsa ' s formation of image is systematic at first in this paper, carried on intact summing up to the data in the system, having given out the plan of design of high speed and large capacity data channel of digital formation of image system of x - ray ; deeper discussion of control way on sdram, give solution that many pieces of sdram works togetherses of realizing heavy capacity, designing of heavy capacity deposit board realize storing at a high speed to vision data by frame on the basis of this ; through further investigations of interface of pci bus, optimize back end state machine design and urge procedure making with lower, giving intact pci interface scheme that realize high speed dma data transmission and satisfy request of video transmitting ; further investigate the figure systematic design method of programmable logic devices, due to the difficult point of drifting about of enabled signal in fifo in common use and setting up and keeping of output signal, method has been proposed of improving stability of system making use of signal utilizing the phase locking ring in fpga to offer a lot of clocks to move thus realize coordinating the data between every module of system to transmit at a high speed by making use of fifo

    本文首先對數字減影血管造影( dsa )成像系統的組成結構和數據流向進行了深入研究和分析,並對系統中的數據流向進行了完整的歸納和總結,給出了x線數字成像系統中的高速大容量數據通道的設計方案;在對sdram的控制方式做了深入探討后,給出了實現大容量多條sdram共同工作的解決方案,在此基礎上設計了大容量幀存板實現對圖象數據進行高速存儲;通過對pci總線介面的深入研究,優化後端設計和低層驅動程序開發,給出了完整的pci介面方案實現高速dma數據傳輸,完全可以滿足視頻傳輸要求;深入研究了基於大規模可編程件的數字系統設計方法,針對通用fifo使能信號漂移、輸出數據難于建立和保持等設計難點,提出了利用fpga中的鎖相環提供多個時鐘相移的信號來提高系統穩定性的解決方案,從而實現利用fifo來協調系統各模塊之間的數據高速傳輸。
  5. This thesis focuses on the ingress process module of ctu, which translates c - 5 dcp format to rainier 4gs3. the specification analysis, architecture and logic design, functional simulation testbench design, synthesis report and testing result are discussed in this thesis. the research work mainly includes : the specification analysis and design requirements of ctu logic ; the architecture and logical design of ingress process module, which includes receive control fsm, send control fsm and cell position adjustment logic ; the performance improvement of ingress process module to receive and transmit data cell at the full line speed

    本論文的主要研究工作包括:通信協議轉換邏輯的功能分析和設計需求;通信協議轉換邏輯上行方向的系統分析及體系結構設計,包括上行接收、發送、信元內位元組位置調整制等的設計;通信協議轉換邏輯上行方向的線速設計,主要是上行接收的線速設計,要使用流水設計技術;提出了高速實現roundrobin調度策略的實現方法,並設計實現了桶式移位和優先級編碼電路;應用bfm模擬模型設計了上行處理各模塊的模擬testbench ,完成了各級模塊的模塊模擬和系統集成模擬。
  6. That is one of the reasons finite - state machines have been deployed for years in graphics processors and voice - recognition systems and in hardware design

    多年來,繪圖處理、聲音辨識系統與硬體設計一直都採用有限,這就是原因之一。
  7. Unlike the von neumann namesake, van lunteren and engbersen ' s finite - state machine can evaluate multiple things simultaneously in a single cycle, instead of considering just one, as happens in the process that is controlled by the program counter

    范盧特倫及英伯森的有限與馮諾曼的架構不同,可在單一周期內同時計算多個項目,而不像程式計數控制下的流程一樣必須逐一檢查。
  8. This course consists of lectures and labs on digital logic, flipflops, pals, counters, timing, synchronization, finite - state machines, and microprogrammed systems

    本課包括了數字邏輯、觸發、 pal (可編程邏輯陣列) 、計數、時序、同步、有限、和微控制系統方面的講課與實驗。
  9. The media enhancement extension to mips - i compatible isa is physically realized in the processor core, and improves media processing performance effectively ( 2 - 4x ) with negligible additional hardware cost ( 2. 7 % ). a finite state machine ( fsm ) based centralized control scheme is presented in this paper to supervise the cpu pipeline activity

    在系統晶元中媒體數字信號處理核的設計中,在具體分析cpu流水線競爭和處理異常的基礎上,本文提出並實現了一種基於有限的流水線運行控制方案,並從提高鐘頻和降低cpi值兩個方面優化處理性能。
  10. Then the designs of modules mentioned in the scheme are discussed in detail. the main contents of the dissertation include : 1. to satisfy the need of a16 / d16 single - cycle and block data transfer capability, the method of the state machine and diagram are adopted. the arbiter, requester, interrupter, interrupter handler modules are also implemented by use of the state machine. these modules are verified theoretically by using timing simulation

    本文具體工作如下: 1 .用和電路圖的方式實現了vme總線a16 / d16單周期數據讀寫和塊傳輸功能;並用設計了vme總線請求,總線仲裁,中斷和中斷處理等,並進行了時序模擬。
  11. Loosely speaking, model checking is a way to check for the existence of a finite state machine ( specification ) in another finite state machine ( program )

    不嚴格地說,模型檢查是在一個有限狀態機器(程序)中檢驗另一個有限狀態機器(清單)存在性的一個方法。
  12. The program being checked is also converted to a finite state machine, created by abstracting away all the details except the atomic predicates observed in the program

    被檢查的程序也被轉換為一個有限狀態機器,通過摘掉所有細節、只保留程序中被觀測的原子謂詞。
  13. The property to be checked is described as a finite state machine that transitions on atomic predicates, properties that can be identified by cursory look at the program

    所要檢查的特性被描述為一個有限狀態機器,即原子謂詞上的轉變,這樣粗略地查看程序就能識別出這些特性。
  14. Memory controller design and ip interconnection are the common issues in system - on - a - chip ( soc ) design. having analyzed the established ip interconnection strategy and sgram characteristics, the author put forward the multi - agent momery interface interconnection strategy, defmed the interface protocol and implemented the momery interface design using finite state machines

    存儲控制電路的設計和ip互連是soc設計中常遇到的問題。在分析了已有的ip互連制和sgram特性后,本文給出多客戶存儲介面的互連策略、定義了介面通信協議並且用實現了該介面電路的設計。
  15. When the machine is on regular production, turn the safety lock on and enter safety status, the machine will stop immediately to avoid accident if someone opens the safety guarding system

    正常生產時,打開安全鎖進入安全將立刻停止以避免事故的發生,當人打開安全向導系統時。
  16. After analyzing typical text information extraction inductive algorithms based on wrapper model, making use of the important features of the pages, such as annotations and text pattern features, an inductive algorithm is proposed using wrapper model for information extraction. the new algorithm can add the annotations to the state sets of rule ’ s finite state machine, so it can effectively reduce the time spending on search, and can also accurately locate the target information ; the learned text pattern can be used to filter out the un - interrelated extracted information

    在分析了基於包裝模型的文本信息抽取典型歸納學習演算法的基礎上,利用頁面的一些重要特性,例如注釋和文本模式信息,提出了一種新的歸納學習演算法,新演算法將注釋信息加入到抽取規則的有限序列中,從而能有效地降低演算法搜索時間,並能對目標信息進行充分的定位;並且新演算法能用學習到的文本模式信息對抽取結果進行必要的過濾。
  17. Kuiper originally used cwmtx to simulate systems built from discrete and interactive state machines

    Kuiper原先用cwmtx來模擬用離散的互動式狀態機器構建的系統。
  18. The graph can be seen as a state machine. although, the executional model that we will explain here is concrete and has better support for concurrent paths of execution

    這個圖表可以看做是一個狀態機器。雖然我們這里解釋的執行模式是具體的且更好的為並發路徑執行提供更好的支持。
  19. If wep is not involved, it effectively exploits the so - called race conditions between the 802. 1x and 802. 11 state machines, in which a thief who wants to steal the session is racing the owner to the access point " door. " if he wins, he owns everything

    如果沒有wep ,它會有效地利用802 . 1x和802 . 11狀態機器之間所謂的競爭條件,這樣想竊取會話的小偷就在與會話所有者競爭接入點「門」 。如果他贏了,那麼他就擁有了一切。
  20. This device performs synchronism of sewing and edge trimming. the trimmer is easily engaged or disengaged while sewing is being done

    構可同時完成縫制和修邊。縫制時通過簡單的操作即可使切刀脫離或進入工作轉動時就會精巧的修邊。
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