耗盡型器件 的英文怎麼說

中文拼音 [hàojìnxíngjiàn]
耗盡型器件 英文
depletion device
  • : Ⅰ動1 (減損; 消耗) consume; cost 2 [方言] (拖延) waste time; dawdle Ⅱ名詞1 (壞的音信或消息) ...
  • : 盡Ⅰ副詞1 (盡量) to the greatest extent 2 (用在表示方位的詞前面 跟「最」相同) at the furthest ...
  • : 名詞1. (器具) implement; utensil; ware 2. (器官) organ 3. (度量; 才能) capacity; talent 4. (姓氏) a surname
  • : Ⅰ量詞(用於個體事物) piece; article; item Ⅱ名詞1. (指可以一一計算的事物) 2. (文件) letter; correspondence; paper; document
  • 耗盡 : exhaust; use up; deplete; exhaustion; depletion; consumption; burning up; impoverishment
  1. Influences of the parameters on device performance such as thickness of strained si, ge content, channel doping and thickness of buried oxide are discussed based on given models. the models could be very helpful for device design

    根據所建立的模,針對硅膜厚度、 ge組分、摻雜濃度和埋氧層厚度等參量對薄膜全strained - soimosfet性能的影響進行詳細討論,為結構設計提供了理論基礎。
  2. Abstract : a new approach, gate - capacitance - shift ( gcs ) approach, is described for compact modeling. this approach is piecewise for various physical effects and comprises the gate - bias - dependent nature of corrections in the nanoscale regime. additionally, an approximate - analytical solution to the quantum mechanical ( qm ) effects in polysilicon ( poly ) - gates is obtained based on the density gradient model. it is then combined with the gcs approach to develop a compact model for these effects. the model results tally well with numerical simulation. both the model results and simulation results indicate that the qm effects in poly - gates of nanoscale mosfets are non - negligible and have an opposite influence on the device characteristics as the poly - depletion ( pd ) effects do

    文摘:提出了一種新的建立集約模的方法,即柵電容修正法.此方法考慮了新效應對柵電壓的依賴關系,且可以對各種效應相對獨立地建模並分別嵌入模中.另外,利用該方法和密度梯度模建立了一個多晶區內量子效應的集約模.該模與數值模擬結果吻合.模結果和模擬結果均表明,多晶區內的量子效應不可忽略,且它對特性的影響與多晶效應相反
  3. Semiconductor discrete device. detail specification for silicon n - channel deplition mode field - effect transistor of type cs146

    半導體分立. cs146硅n溝道場效應晶體管.詳細規范
  4. Semiconductor discrete device. detail specification for type cs141 silicon n - channel mos deplition mode field - effect transistor

    半導體分立. cs141硅n溝道mos場效應晶體管詳細規范
  5. Semiconductor discrete device. detail specification for type cs140 silicon n - channel mos deplition mode field - effect transistor

    半導體分立. cs140硅n溝道mos場效應晶體管.詳細規范
  6. Semiconductor discrete device. detail specification for type cs5114 cs5116 silicon p - channel deplition mode field - effect transistor

    半導體分立. cs5114 cs5116硅p溝道場效應晶體管詳細規范
  7. Semiconductor discrete device. detail specification for type cs4091 cs4093 silicon n - channel deplition mode field - effect transistor

    半導體分立. cs4091 cs4093硅n溝道場效應晶體管詳細規范
  8. Semiconductor discrete device. detail specification for types cs4856 cs4861 silicon n - channel deplition mode field - effect transistor

    半導體分立. cs4856 cs4861硅n溝道場效應晶體管詳細規范
  9. Semiconductor discrete device. detail specification for silicon n - channel deplition mode field - effect transistor of type cs1 gp, gt and gct classes

    半導體分立gp gt和gct級cs1硅n溝道場效應晶體管.詳細規范
  10. Semiconductor discrete device. detail specification for silicon n - channel deplition mode field - effect transistor of type cs4. gp, gt and gct classes

    半導體分立gp gt和gct級cs4硅n溝道場效應晶體管.詳細規范
  11. Semiconductor discrete device. detail specification for silicon n - channel deplition mode field - effect transistor of type cs10. gp, gt and gct classes

    半導體分立gp gt和gct級cs10硅n溝道場效應晶體管.詳細規范
  12. Physics device model, component structure design and fabrication technology are discussed based on the thorough analysis of strained silicon and soi physics mechanism. the detail contents are as follows. the analytical threshold voltage model, drain current model and transconductance model are derived from poisson ’ s equation for the fully depleted strained soi mosfet

    本論文圍繞這一微電子領域發展的前沿課題,在深入分析應變硅和soi物理機理的基礎上,對的物理模結構設計和工藝實驗等問題作了研究,主要包括以下幾部分:首先,從的物理機制出發,建立主要針對薄膜全耗盡型器件的閾值電壓、輸出電流和跨導模
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