譯碼機構 的英文怎麼說
中文拼音 [yìmǎjīgòu]
譯碼機構
英文
decoding mechanism-
Turbo codes represent the new code structures, which consist of pccc ( parallel serially convolutional code ) and sccc ( serially concatenated convolutional code ). in this paper, the background of turbo codes are firstly introduced, which includes the base principle of error correction code 、 block code and convolutional code ; the principle of turbo code and the iterative decoding is secondly expanded ; the key decoding algorithm : a revised map algorithm and iterative decoding theory are detailed ; then, a new turbo code structure : hccc ( hybrid concatenated convolutional code ) is presented, and the capacity of this code method is analyzed, the average capacity upper bound is derived ; at last, this code is simulated on awgn ( additive white gaussian noise ) channel and rayleigh fading channel
本文首先介紹了turbo碼的背景知識，包括差錯控制的基本原理、分組碼和卷積碼；然後闡述了turbo碼的基本原理，包括turbo編譯碼器結構及迭代譯碼原理；較為詳細地描述了關鍵的譯碼演算法： ?種改進的最大后驗概率（ map ）譯碼演算法及迭代譯碼演算法；提出了一種新的turbo碼結構：混合turbo碼（混合級聯卷積碼） ；並用編碼性能聯合界分析方法對混合turbo碼進行了性能分析，得出了其平均性能上界；並在高斯白噪聲通道和瑞利衰落通道上分別作了一些應用研究及計算機模擬實驗。An engineer case is introduced, which is " the identification of coke oven sequence number and distant transmission of pushing coke information ". advanced technology of wireless data transmission and computer control is adopted to improve pushing coke motor. the data transmitter - receiver is introduced in the engineer case, and the improved step - by - step decoding algorithm is put into practice
在此系統中對推焦車採用較為先進的無線遠傳技術和計算機控制技術進行改造，選用深圳「友迅達」的數傳電臺fc - 201 e開發了「推焦過程信息遠程傳輸系統」 ，並將本文提出的這種改進的step - by - step譯碼演算法應用其中，實現推焦車上的推焦過程監測儀和上位機以及其他現場執行機構的可靠、有效的通訊。Random access memory is used to store dynamic data structures and jit - compiled code
隨機訪問存儲器（ ram ）用於存儲動態數據結構和jit編譯的代碼。The compiler can reduce many c and c constructs to functionally similar sequences of machine code
）編譯器可以將許多c和c + +構造縮小為功能類似的機器碼序列。New initiatives include setting up of more regional cyber centres, exploring the feasibility of text - to - speech translation services for government web sites and collaborating with it professional bodies to encourage the private sector to adopt to barrier - free web design methods
有關的新措施包括設立更多地區性的數碼中心，研究可否為政府網站提供文字轉換語音的翻譯服務，以及與資訊科技專業組織合力鼓勵私營機構採用無障礙網頁的設計方法。Thesis introduces the architecture of the grid simulator, the mechanism and process of the modeling simulation and the realization method of every module in details. it includes the modules of user and resource, resource scheduling police, grid environment, java code generation, code compilation and execution and result analyses
文中詳細介紹了pactsim網格模擬器的體系結構，建模模擬機制和模擬過程以及各個模塊的實現方法，主要包括用戶及資源模擬，資源調度策略模擬，網路環境模擬， java代碼的生成，編譯及運行，模擬結果的分析等模塊。It probed into the key technology of realizing the integrated development environment, including the methods to implement a code editor which support many features as automatic syntax highlighting, code autocompletion etc. ; the scheme and technology to compile and link the source code on the heterogeneous cluster system ; the analysis and use of the api of pbs, a widely used job management system ; the scheme and technology to distribute and manage the parallel jobs on the heterogeneous cluster system ; the methods to implement the monitor and control system of cluster nodes. and then the parallel programming integrated development & management environment ( ppidme ) was implemented base on the above analyses. finally, an example is presented which use ppidme in parallel programming
本文在對異構機群并行計算環境研究的基礎上，提出了對于程序員友好、方便和實用的集成開發環境應該具備的要素，著重探討了實現集成開發環境的關鍵技術，其中包括支持語法高亮等功能的源代碼編輯器的實現方法、異構機群環境下源程序編譯連接及并行作業分發管理的實現方案與技術、 openpbs作業管理系統的應用編程介面的分析與使用、機群節點的管理與監控實現方法等，並基於上述關鍵技術設計與實現了異構機群系統集成開發管理環境軟體ppidme ，最後給出了使用ppidme進行并行程序開發的一個應用實例。Just as oop programs can be compiled and executed by different mechanisms for example, interpreted or compiled to bytecode or object code, aop tools offer different facilities for building and executing aspects
正如可以用不同的機制（例如，解釋或編譯成位元組碼或對象代碼）編譯和執行oop程序那樣， aop工具為構建和執行方面提供了不同的工具。When the resulting executable is run, tags are sent to a data collection agent that then sends the data to the host application. using this technology, codetest provides performance, coverage, and memory analysis, and a software execution trace capability similar to a logic analyzer
在構建處理過程中，在不影響原始源代碼的前提下，使用編譯器將插樁標記插入代碼。運行結果執行時，標記被發送至數據收集代理，然後數據被發送至主機應用。採用此技術，The research for key techniques of turbo codes is processed. it includes, ? the design of optimal component codes and the performance of asymmetric turbo codes are analyzed ; ? a search algorithm for short random interleaver based on the distance spectrum and ids criteria is carried out and simplified ; ? random puncturing method to improve the weight distribution of turbo codes with some special code rates is analyzed and simulated. ? the effect of different schemes of trellis termination to the performance of turbo codes is analyzed ; ? a new low complexity decoder structure is provided ; 5
對turbo碼的部分關鍵問題進行分析和改進，主要包括： ?分析了最優分量碼的設計和非對稱turbo碼的性能； ?設計了基於距離譜和ids的短隨機交織器搜索演算法並進行了簡化； ?提出了採用隨機刪余方式改善特定高碼率turbo碼重量分佈特性的方法； ?分析了不同編碼器狀態歸零方案對turbo碼性能的影響； ?提出了一種降低實現復雜性的turbo迭代譯碼器結構。As a result, c2000 compiler can generate a compactly structured intermediate code effectively, which can be executed by c2000 virtual machine efficiently, safely, and stably. thus the problem put forwarded at the beginning of this paper is solved, and the requirement of monitoring configuration software in the support of programming interface is satisfied well
實際應用表明， c2000編譯器能夠生成結構緊湊的中間代碼，其虛擬機對中間代碼解釋執行時，效率高，運行穩定、可靠、安全，解決了一般組態軟體中在對用戶編程介面支持方面的問題，很好地滿足了監控組態軟體的需求。It has been playing an important role in equipping all kinds of arms and services for campaigns, tactical exercises and emergent actions etc. based on the detailed analysis of the exchange ' s architecture and implementing, this thesis points out some disadvantages of the device, such as too many absolute components, not very high enough reliability and security, very large size and weight, operating and maintaining difficultly. considering low power requirement and man - machine interface optimizing design at the same time, the thesis come up with an integrated design scheme to the previous device based on " mcu + cpld / fpga architecture " : ( 1 ) signal frequency dividing, timing frequency producing, 20 customers " led states controlling are implemented in cpld ; ( 2 ) decoding, latching data and controlling signals are implemented in cpld by bus interface between mcu and cpld ; ( 3 ) chip selecting principles and mcu idle mode design are completed under the consideration of low power requirement ; ( 4 ) operation by chinese lcd menus is adopted in the man - machine interface
本項目以該交換機為研究對象，在詳細分析原設備的系統結構和功能實現方式的基礎上，指出該機型在使用過程中存在技術相對陳舊、分立元件過多、可靠性和保密性不夠、體積大、重量大、維修困難等問題，同時結合系統的低功耗需求和優化人機介面設計，本文提出基於「單片機+ cpld fpga體系結構」的集成化設計方案：在cpld中實現信號音分頻和計時頻率生成電路、 20路用戶led狀態控制電路； cpld與單片機以總線介面方式實現譯碼、數據和控制信號鎖存功能的vhdl設計；基於低功耗設計的器件選型方案和單片機待機模式設計；人機介面的lcd菜單操作方式。1. study of the clb bus protocol and the pvci protocol ; 2. the design of clb - pvci bridge architecture ; 3. the design of each functional module, include the state machine, the address decoding and peripheral ip selection module, datapath module
Clb總線協議和pvci協議的研究； 2 clb - pvci橋總體結構的設計； 3各功能模塊的設計，包括狀態機、地址譯碼和外設ip選擇模塊、數據通道模塊； 4The paper puts forward a kind of economical numerical control milling machine system which is supported by windows and industry pc that are acted as software and hardware platform on the base of analyzing the present development of economical numerical control system and some existent problem, and expatiates the system software ' s collectivity frame, also introduces detailedly form and operational way of the user ' s interface. besides, the thesis also frames and accomplishes each module such as syntax inspect module, translation module, tool compensation module and track interpolation module adopting visual c + + 6. 0 and the kind of facing object and modularized program design method by analyzing rationales and function of the software ' s modules, moreover presents the programmer ' s flow chart and parts of source code, whereafter validates arithmetic of translation and tool compensation by simulating process testing program
本文在分析了我國經濟型數控系統的發展現狀以及目前存在的一些問題的基礎上，提出了一種以windows和工業pc機作為軟、硬體平臺的經濟型數控銑床系統，闡述了該系統軟體的總體結構，並對其用戶界面的組成及其操作過程做了較為詳細的介紹，分析了軟體的各個模塊的基本原理和功能，採用visualc + + 6 . 0以及面向對象、模塊化的程序設計方法，完成了語法檢查模塊、譯碼模塊、刀具補償模塊以及軌跡插補模塊的具體設計，並給出了程序設計流程圖和部分源代碼，通過系統的模擬程序模擬加工過程驗證了譯碼和刀補演算法的正確性。Three decoder architectures, parallel, serial and partially - parallel approaches, are analyzed in this thesis. a kind of novel partially - parallel architecture for decoding ldpc code is proposed. the trade - off between the performance of the decoder, hardware complexity and data throughout can be achieved with this partially - parallel architecture for the random parity check matrix
論文分析了三種不同的譯碼器結構:并行結構、串列結構以及部分并行結構，並提出了一種新穎的部分并行結構的ldpc譯碼器，較好地解決了當校驗矩陣為隨機結構時，譯碼性能、硬體資源和數據吞吐量平衡的問題。And some other construction methods based on finite geometry, graph theory and group theory are also depicted. an algebraic construction method for ldpc codes with 8 - girth is proposed based on complete residue system. simulation results show that these codes can achieve better performance than randomly constructed regular ldpc codes over awgn channel
最後，在分析、研究現有構造方法的基礎上，基於代數中的完全剩餘系，作者提出了一種代數構造方法，使得ldpc碼對應因子圖上的圍長為8 ，並採用計算機對其性能進行了模擬，結果表明該碼能夠取得比較理想的譯碼性能。Firstly, we analyze the advantages and disadvantages of the random and nonrandom interleaver respectively, and bring forward the method of constructing a semi - random interleaver. then we deal with the decoding of turbo - codes, and compare the performance of several usual decoding methods. in addition, we give the performances of log - map and sova are simulated
分析了隨機和非隨機交織各自的優缺點，並提出了半隨機交織的構造方法；然後，比較了常用的幾種譯碼方法，並且實現了log - map演算法和sova演算法的性能模擬，對不同譯碼演算法下turbo碼的性能進行了分析比較。A design method based on the decomposition and multiplexing technique of complex instruction, combined the decoding arithmetic of instruction and a step counter together, sub - step realization method of multiclocks is proposed. the similarities and differences of architecture between fsm and multi - ? ocks are discussed from two aspects, timing and state space
提出了執行周期復用的指令分解、指令寄存器與步長計數器聯合譯碼，以及多時鐘同步的控制流設計方法；進而從時間和狀態空間兩個角度深入討論了控制流設計中狀態機和多時鐘兩種常見體系結構的異同。After a great amount of detailed computer simulations and concise qualitative and quantitative theoretical analysis, the turbo codes " parameters and fpga specific hardware implementation architecture suitable for being integrated into dtv systems are determined. furthermore, the codec is completely designed with verilog hdl, ending with an occupation of less than a 600 - thousand - gate fpga chip. at this lowest hardware cost, a white noise snr threshold of 1. 8db at a net stream rate of 6mbps is achieved, which exceeds all other existent dtv systems " performance
經過大量詳細的計算機軟體模擬和簡明扼要的定性與定量的理論分析，最終確定了數字電視系統中適合採用的turbo碼參數及針對fpga特殊構架的硬體實現結構，並用verilog硬體描述語言完成了turbo碼編譯碼器的完整設計，以佔用不到一片60萬門fpga晶元的較少的硬體資源取得了在6mbps凈碼率下1 . 8db的白噪聲信噪比門限這一遠遠超過現有任何數字電視系統的性能。Avoid any agencies that post jobs on the internet or contact you by e - mail but fail to give detailed background information on themselves ( phone number, mailing address, etc. )
七、避免同那些只是通過電子郵件或在網上公布工作信息，而拒絕提供關於他們公司的詳細背景（如電話號碼、通訊地址等）的翻譯機構合作。分享友人