邏輯電平 的英文怎麼說

中文拼音 [luódiànpíng]
邏輯電平 英文
logic level
  • 邏 : Ⅰ動1. （巡察） patrol 2. [書面語] （遮攔） blockⅡ名詞1. （巡察） patrol 2. [書面語] （山溪的邊緣） edge
  • 輯 : Ⅰ動詞（編輯; 輯錄） collect; compile; edit Ⅱ名詞（整套書籍、資料的各個部分） part; volume; division
  • 電 : Ⅰ名詞1 （有電荷存在和電荷變化的現象） electricity 2 （電報） telegram; cable Ⅱ動詞1 （觸電） give...
  • 平 : Ⅰ形容詞1 （沒有高低凹凸 不頃斜） flat; level; even; smooth 2 （高度相同; 不相上下） on the same l...
  • 邏輯 : logic
  1. In the hardware design, the paper completes modules ’ design like outside memory, patulous a / d, patulous d / a, rs232 communication, ecan communication, led control, keyboard control, distant control, emulation, reset, logic voltage switch, dsp supply power regulate and ac - dc power circuit, as well as room layout design like anterior panel, back panel etc. and dsp transfers data with peripheral equipments except outside memory using serial ports. besides, the whole circuit is configured in interrupt response. thus, it can meet system demand as well as take full advantage of tms320f2812 ’ s hardware resource. in the software design, the paper finishs programs like the interface programms intercommunicates with people, the distant control program, ad and da modules ’ control program, in addition, the paper select the velocity and acceleration state - feedback algorithm and is written in the program. the software design uses dsp integrate exploiting environment named ccs2. 2 of ti inc. as software instrument, and programs with the combination of c language and assembly language. moreover, in order to maintenance or modify the software expediently and shorten software ’ s exploitation time, the design adopt software modularization technique. finally, some air cylinder experiments are carried out to proved that the pneumatic controller is very practical

    在硬體設計中，本文完成了片外存儲器擴展、 a / d擴展、 d / a擴展、 rs232通信介面、 ecan通信總線介面、液晶顯示控制、鍵盤控制、遠程控制、模擬、復位、邏輯電平轉換、 dsp工作電源校正電路和ac - dc電源等模塊設計以及控制器前面板、後面板等的空間布局設計。其中dsp與除外部存儲器的外圍設備之間的數據傳送全部採用串口通信，同時系統電路配置成中斷響應方式，這樣既滿足了系統要求，又充分利用了tms320f2812的硬體資源。在軟體設計中，本文完成了人機界面功能模塊、遠程控制模塊、 ad擴展模塊、 da擴展模塊、速度和加速度狀態反饋的控制演算法的程序設計。
  2. In this paper, based on the study of vga graphic displaying theory and the theory of synchronizing display between led large - screen display system and crt image, a method, bit plane addressing method which has good effect -. high ratio of performance to price and can be implemented easily in circuits is discussed. and the principle and the implementation of the multi - gray led display system with programmable logic devices cpld and fpga are analyzed in detail

    本文在分析vga圖象顯示原理和led大屏幕與crt視頻圖像同步顯示原理的基礎上，論述了一種顯示效果較好、性能價格比高、電路上易於實現的方法? ?位平面尋址法實現多灰度圖象，並詳細分析了應用復雜可編程邏輯器件cpld和在線可編程邏輯器件fpga實現多灰度彩色led大屏幕圖像顯示的原理及電路實現。
  3. It is divided into port state control ( psc ) security check, flag state control ( fsc ) security check, ships quality appraisal, assistant business, report forms, the assurance of the target ship, electronic declare management, parameter design and purview management, the form design. the course of system implement is given in the thesis. the thesis emphasized to introduce the business logic of the psc security check and report forms 。 the implementation of pagestudio is detailed in the thesis

    深圳海事數字平臺分為港口國安全檢查（ psc ） 、船艦國安全檢查（ fsc ） 、船舶質量評價、輔助業務、報表、目標船的確定、電子申報管理、參數設計與權限管理、表單設計器9個功能模塊，在文中給出了系統開發環境搭建過程，並著重介紹了psc安全檢查與報表統計模塊的業務邏輯。
  4. Therefore, it can be named by “ the specific demultiplexer of sdh ”. the design of pos line card was discussed and we also have finished the control logic of the hardware platform of the specific demultiplexer

    論文主要討論專用分接器的pos線卡設計和硬體平臺的控制邏輯電路設計與實現。論文首先對基於fpga的10gbps的pos線卡的設計方案進行了研究。
  5. Describes the design and realization of partial run - time reconfigurable fpga in detail. in order to reduce the affect of the reconfiguration time on system execution time, mostly static circuit design method in logical design stage and incremental routing method in component implementation stage are proposed. the fft parallel processing algorithm is examined through vvp platform

    本章詳細闡述了基於vvp平臺的多sharc功能插板的具體硬體實現，以動態重構fpga設計為核心，論述了局部動態重構fpga設計流程和方法，提出了極大靜態電路邏輯設計方法和遞增式布線方法，以達到減小動態重配置時間，提高系統運行效率的目的。
  6. In the modulation / demodulation circuits, cpld is selected as platform of the digital logic part, which includes series - shunt / shunt - series transform, difference coding and sample verdict

    調制/解調電路中，串並/並串變換、差分編/解碼和抽樣判決等數字邏輯部分是以cpld作為開發平臺，論文給出了實現上述功能的vhdl程序及模擬、測試結果。
  7. Site experiment were carried out on the testing vehicle for ahs and the magnetic markers road in national intelligent transport system center. also, study on multi - sensor information fusion and control model by using neural net system, fuzzy logic and genetic algorithm were carried out. the work completed are as follows mainly : ( 1 ) hardware system for lane keeping system including magnetic marker, magnetic sensor, control system and executor machine were designed

    本文以國家智能運輸系統研究中心的自動公路系統試驗車和專用的磁軌釘道路為工作平臺，在大量的現場實驗基礎上，針對基於磁軌釘導航的車輛車道保持技術中的若干問題展開研究，運用神經網路、模糊邏輯、遺傳演算法等方法在多傳感器信息融合、控制模型等方面進行了系統的研究，主要完成了以下幾方面的工作： （ 1 ）對車道保持系統硬體平臺進行了設計，論述了導航設施? ?磁軌釘的設計過程和車載工控機、步進電機等的選擇。
  8. In chapter 4, the circuit of the carrier synchronization unit is implemented on fpga, the resistor transistor logic ( rtl ) schemes are presented

    第四章在fpga平臺上實現載波同步單元電路，並給出了實現后的fpga資源消耗、寄存器傳輸邏輯（ rtl ）原理圖。
  9. Therefore it comes true the on - line adjusting, real - time control and so on. it sames as real locale. the software of logic protect ( include electric logic ) and control includes some usual algebraic and operation model of thermal control and logic operation of logic protect. it adopts foxboro ' s dcs as a example, so we configuration via filling table, user only define i / o condition, fill certain operation variable, and name logic variable. the software offers a friendly user ' s interface, personnel can compile and modify the control and logic program, change the value of logic and control variable conveniently, attach themselves to run, debug and control the set, not need to know about the inside of the old programs deeply. so the configuration software offer a flat that control engineer can attend to the structure of control loop and logic protect ( include electric logic ), not but to handle complicated program

    它以foxboro的dcs控制系統為主要參考模式，採用填表的方式進行控制組態，用戶只需定義i / o條件、填寫具體的運算變量名、邏輯變量名即可。本軟體為建模人員提供了一個友好的用戶界面，使建模人員在建模時不必對模塊內部的控制、邏輯程序有很深的了解就可以方便的對其進行編寫和修改，實時改變各邏輯和控制變量在數據庫里的值，參與運行和調試，從而實現對機組的控制。因此，本組態軟體提供的這樣一個平臺，讓控制工程師能集中精力于控制迴路及邏輯保護（包含電氣邏輯）的構成，而不必拘泥於一些具體而煩瑣的程序操作。
  10. The paper analyzes the drawbacks of traditional auction system based on mas and the trend of electronics auction, and deeply studys current auction system. combined with cooperation games theories, this paper gives the rules of alternating double auction, brings up the cooperation model cm and agent based on cooperation games, and uses the bdi model to build agent, and gives the bdi logical of mean and reason logically. at last, this paper establishes alternating double auction platform and researches agent ' s cooperating auction on this background

    分析了傳統的基於mas拍賣系統的不足以及當前電子拍賣的發展趨勢，深入研究了當前拍賣系統，結合合作博弈理論，給出互動式雙邊拍賣平臺的拍賣規則，提出互動式雙邊拍賣平臺的合作模型cm和基於合作博弈的agent ，並使用bdi模型建立基於合作博弈的agent ，給出agent的bdi邏輯表示以及推理，並建立互動式雙邊拍賣測試平臺，在該平臺下進行多agent合作拍賣的研究。
  11. Finally, compared with the existing similar studies, the paper is creative in research method, that is interpreted a paradex of the reformation logic in china telecommunition industry through game theory, when we realize the really causality, maybe we can formulate a policy to promote the development of china telecommunication industry

    與已有同類研究相比，論文在研究方法上有所創新，即對于中國電信改革邏輯的不一致提出了一個博弈論意義上的解讀，即如果電信管制機構本身就是電信博弈格局中與受管制企業有利益正相關性的一方當事人，那麼它不可能制定出一個公平的、有效的博弈規則，從而電信有效競爭格局無法形成。
  12. The system uses the permanent magnet synchronous machine as the driver motor based on the idea of polygonal flux linkage locus and the permanent magnet brush - less motor is as the momentum balance motor by means of speed and current loop in order to track driver motor precisely and rapidly. the harmonious control of driver motor and balance motor is realized by making full use of the dsp hardware resource and complicated programmable logic device. the software design is composed of c and assembly language to realize motor control arithmetic of polygonal flux linkage locus

    衛星天線伺服控制系統以正弦波永磁同步電機作為驅動電機，採用多邊形磁鏈軌跡法（電壓空間矢量法）的控制策略；動量平衡電機採用永磁無刷直流電機，通過電流環、速度環達到快速、精確跟蹤驅動電機的目的，確保了衛星姿態恆定；設計方案中充分利用了dsp硬體資源和復雜邏輯陣列實現了驅動電機和平衡電機的協調控制，並通過c語言和匯編語言的混合編程實現了電機的多邊形磁鏈軌跡控制演算法。
  13. Then we explicate the hardware design in details, including implementing ad convert, extending multiple serial communications and external memory, and using cpld do some logic controls. thereby we implement abundance simulation interface, flexible digital interface and serial communication interface. at last we describe the software design, including software design of cpld basing on vhdl and software design of dsp

    本文首先介紹飛行模擬訓練系統的主要組成；接著說明飛控計算機整體系統方案的設計；然後詳細說明飛控計算機硬體平臺的設計，包括ad轉換、多串口通信、外部存儲器的擴展以及採用可編程邏輯器件cpld實現電路的邏輯控制等幾部分，體現了系統豐富的模擬介面、方便靈活的數字介面和串列通信介面；最後是軟體部分的編程，包括cpld部分的硬體描述語言程序設計，和dsp部分相關的程序設計。
  14. Considering the characteristic of the management, based on the equipment parameter data and the graphic platform made by blueprint, the method realizes the graphical equipment management and relaying protection simulation and then integrates the data of the management, therefore, improves the job efficiently

    該方法根據變電管理的相關特點，從設備臺賬數據出發，以設備圖紙構成圖形平臺，實現圖形化的臺賬管理、缺陷管理、工作票管理及繼電保護動作邏輯模擬，從根本上實現了變電管理中的數據一體化，從而有效地改善了變電管理工作。
  15. Through analyzing the present chengdu electronic government network with the economical and practical thought, the paper propose a solution that selects domestic nc ( network computer ), domestic servers, and domestic linux os to build up a economical and adequate foundation information platform ; that uses open source java tools to develop essential and effective electronic government cooperation office software corresponding with our national conditions, addressing the demand of daily archives transfer, information communication and conference management ; that develops the data exchange engine based on xml and mail to apply safe data exchange between the office software in the electronic government network and the government portal in the internet, according to the logic separation of the electronic government network and internet

    本論文本著經濟實用的思想，利用成都市現有的電子政務網路進行合理劃分、設計，合理選型國產nc網路計算機（ networkcomputer ） 、國產linux操作系統來搭建經濟、夠用的基礎信息平臺：利用開源的java工具開發適合中國國情簡潔、有效的電子政務協同辦公軟體，可滿足政府日常公文流轉、信息溝通、會議管理等需求：根據電子政務外網與公網邏輯隔離的特點，開發基於xml和郵件的數據交換引擎實現電子政務外網中辦公軟體和公眾網中政府門戶網站的安全數據交換。
  16. Concretely, on the basis of describing the communication specification of arinc 429 with enhanced parallel port ( epp ), the standard and the module application of dsp and cpld, the thesis has proposed the design of the arinc 429 technology based on dsp system. at first, the function and the application of each module of the system and the operation principle of high - performance cmos bus interface circuit hs - 3282 chip which forms the main body of the data diversion of the interface module are introduced. secondly, the hardware structure of the interface module is described in detail, mainly including data latch and buffer circuit, choice circuit of transmission rate, etc. and then the design philosophy and flow charts of the software are fully discussed, such as the basic requirement of software, the design and realization of the function

    本文在簡單的論述了pc並口協議（ epp ）與dsp之間的通信方法、 cpld模塊邏輯控制應用和arinc429的通訊規范的基礎上，給出了基於dsp的arinc429通訊介面的設計方案:對通訊板中各模塊的功能和應用以及構成數據轉換主體的總線介面晶元hs - 3282的工作原理做了說明;介紹了本設計所用的dsp和cpld的功能概況;詳細敘述了通訊板介面模塊的硬體結構設計，其中，對數據緩沖電路、數據傳輸速率選擇電路、邏輯控制電路等各關鍵點做了重點介紹;具體闡述了軟體設計思想及流程圖，包括軟體的基本要求和功能的設計與實現;接著從埠譯碼單元、 i / o通道、電平轉換電路等方面進行了介面模塊的軟、硬體調試;最後，給出了測試結果，對研製工作做了總結，對本設計的優缺點各做了評述。
  17. Note : a maximum is specified that is the most - positive value of low - level input voltage for which operation of the logic element within specification limits is to be expected

    注：在限定的工作條件下，所規定的最大輸入電壓是極不容易保證邏輯單元所期望的低電平輸入電壓的最大正電壓值。
  18. Logic level indicator

    邏輯電平指示器
  19. Specification for analogue voltage ranges and logic levels for mains operated nuclear instruments

    電源控制的核儀表的模擬電壓范圍和邏輯電平規范
  20. So it can accept 8bit digital input voltages and converter them into analog singles at update rates as high as almost 10 mhz

    能將八位的數字邏輯電平以近10m的速率轉換成模擬信號。
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