集成電路邏輯 的英文怎麼說

中文拼音 [jíchéngdiànlùluó]
集成電路邏輯 英文
integrated circuit logic
  • 集 : gatherassemblecollect
  • 成 : Ⅰ動詞1 （完成; 成功） accomplish; succeed 2 （成為; 變為） become; turn into 3 （成全） help comp...
  • 電 : Ⅰ名詞1 （有電荷存在和電荷變化的現象） electricity 2 （電報） telegram; cable Ⅱ動詞1 （觸電） give...
  • 路 : 1 （道路） road; way; path 2 （路程） journey; distance 3 （途徑; 門路） way; means 4 （條理） se...
  • 邏 : Ⅰ動1. （巡察） patrol 2. [書面語] （遮攔） blockⅡ名詞1. （巡察） patrol 2. [書面語] （山溪的邊緣） edge
  • 輯 : Ⅰ動詞（編輯; 輯錄） collect; compile; edit Ⅱ名詞（整套書籍、資料的各個部分） part; volume; division
  • 集成 : integration集成晶體管 integrated transistor; 集成元件 integrated component
  • 電路 : [訊] circuit （ckt）; electric circuit; electrocircuit電路板 circuit board; 電路保持 guard of a c...
  • 邏輯 : logic
  1. With the rapid development of electronic technology, vlsi ( very large scale itegrate circuits ) is widely applied in the electronic equipments. the structure of vlsi is complex, and the density of tube feet is intensive, logic is complicated

    隨著電子技術的飛速發展，電子設備中大量使用大規模集成電路晶元，其結構緊湊，而且電路的管腳密集、邏輯復雜。
  2. Nowadays, all functions of a calculator including calculating units, display driver, keyboard interface and so on, are integrated on one single chip

    現代計算器使用一塊集成電路晶元來完成各種運算、顯示驅動和鍵盤介面等完整功能，依賴的是高度集成的動態cmos邏輯和微碼設計技術。
  3. In chapter three, the all sub - circuits including uvlo, current bias, ldo, oscillator, green mode, slop compensation, power limiting, pwm, ovp, blanking time generator, logic controller are designed and simulated. as a result, all of the sub - circuits are satisfied the requirements

    本文第三章對集成電路內各個模塊包括欠壓保護、電流偏置、 ldo 、振蕩器、綠色模式、斜坡補償、功率限制、脈寬調制、過壓保護、前沿消隱、邏輯控制電路等進行了設計與模擬，且達到了預定的設計目標。
  4. Complex programmable logic device ( cpld ), usually used to develop asic, is widely used in digital system to accomplish complex combinational and sequential logic

    復雜的可編程邏輯器件（ cpld ）廣泛地用於數字系統中，常用作設計自己的專用集成電路，可實現復雜的組合邏輯和時序邏輯。
  5. This design for mvbc system adopts top - down eda common design flow. circuit design adopts veriloghdl coding description. function simulation and timing verification adopt simulation tool vcs of synopsys inc, the logic synthesis tool and fpga programming tool adopt the quartus ii of altera inc, and the fpga advice stratix ii ep2s15

    該mvbc系統設計採用業界通用的自上而下的eda設計方法，電路邏輯實現採用veriloghdl硬體語言描述，功能和時序驗證的動態模擬採用synopsys公司的vcs ，而邏輯綜合與fpga實現採用altera公司的集成開發環境quartusii軟體以及stratixiiep2s15的fpga器件。
  6. During that short period, the tester must also capture the output value of the ic

    在這個過程中，對輸入端施加一個短時的比邏輯值高的電流，同時測試儀器要捕捉到集成電路的輸出值。
  7. In this paper, a firing - pulse generator based on measuring ac system frequency is presented. a modern programmable asic fpga is used to build logical circuits

    本文比較了邏輯圖輸入法和vhdl設計法這兩種集成電路的設計方法，最後選用vhdl來設計fpga晶元。
  8. Thirdly, the paper researchs the application of single electron transistor and the synthesis theory of cicuit based on quantum dot cellular automata by synthesis example of quantum cellular neural network based on build schr ? dinger equation of coupling quantum dot. at last, the paper researchs digital integrated circuit design based on quantum dot cellular automata and design a 8 - bit quantum dot cellular adder by qcadsign based on a method of majority logic reducetion for quantum cellular automata, it prove this designer of 8 - bit quantum dot cellular adder is correctly

    Dinger ）方程為基礎的量子點細胞自動機電路綜合理論，本文以量子細胞神經網路為綜合實例，建立耦合量子點的薛定鄂（ schr ? dinger ）方程組，通過化簡得到類似細胞神經網路的非線性電路方程。最後研究了基於量子點細胞自動機數字集成電路設計，通過建立邏輯方程，簡化邏輯方程，並設計基於精簡qca擇多邏輯門8位加法器，並用qcadesign進行了模擬，實驗證明設計正確性。
  9. Semiconductor devices - integrated circuits - digital integrated circuits - blank detail specification for programmable logic devices

    半導體器件.集成電路.數字集成電路.可編程序邏輯設備的空白詳細規范
  10. 1. a small and cheap 8 - bit microcontroller is used as control core. all components of the sensor, some of which are necessary for the multiple and intelligent functions, are selected ones with low cost and small package. by designing all auxiliary logic circuits in a complex programmable logic device ( cpld ), and integrating all analog circuits in an application specific ic ( asic ), the size of pcb board is greatly reduced, which make it possible that the pcb can be installed with the displacement detector together

    系統採用小型廉價8位微控制器控制，電路內配置了為實現多功能智能化所必需的硬體，並全部採用低價格、小體積器件，還將所有輔助邏輯電路設計在一片復雜可編程邏輯器件cpld內，所有模擬電路集成於一片專用集成電路asic內，大大縮小了電路板尺寸，再與傳感元件組裝在一起，從而使整個系統在保證智能化功能的前提下，具有體積小、成本低、一體化和抗干擾能力強的特點。
  11. With the rapid development of semiconductor, digital integrated circuit ( p, memory, standard logic gates, etc. ) and advance computer technology, the various measuring instruments ( virtual instruments ) with the powerful function of pc are produced in different industrial and scientific research fields. as we all known, the traditional instruments are usually built with discrete components and small scale ics, the disadvantages are obvious in system design, debugging and maintenance

    隨著半導體技術與數字集成電路（微處理器、存貯器以及標準邏輯門電路等）技術的迅速發展，特別是隨著計算機技術的發展，在工業生產和科學技術研究的各行各業中，人們利用pc機的強大處理功能代替傳統儀器的某些部件，開發出各種測量儀器（虛擬儀器） ，傳統儀器的數字邏輯部分多是採用分立集成電路（ ic ）組成，分立ic愈多，給系統的電路設計、調試及維護帶來諸多不便。
  12. Pld refer to the programmable logic device. it is a kind of chip that can be written the design of integrated circuits into its logic arrays

    Pld是指可編程邏輯器件，是一種可將集成電路的設計用編程的方式寫入到其邏輯陣列結構中的一種晶元。
  13. For the high - speed digital signal processing, the structure of fpga and dsp is widespreadly adopted. dsp is more featured in the implementation of complicated algorithm, while field programming gate array ( fpga ) shows more advantage in its flexibility of design, simplicity of system configuration, modification and maintenance. in the paper, the hardware system of the spaceborne radar is based on the structure of fpga and dsp, of which the signal processing part is accomplished with one fpga chip and multi dsps

    Dsp適合完成結構復雜的演算法;現場可編程邏輯陣列（ fpga ）適合完成高效、演算法固定的任務;與專用集成電路（ asic ）相比， fpga優點主要在於其很強的靈活性、可在線配置、修改和維護方便等優點。本文工程中的星載雷達信號處理和控制系統就是採用dsp + fpga的方式。其中信號處理採用的是xilinx公司的virtex -和virtex系列fpga和多片analogdevices公司的tigersharcts101的硬體電路結構。
  14. First, the state - of - the - art of spic is presented 。 smart power ic ( spic ) ， which combines the power devices into low - voltage control circuits, drive circuits as well as protection circuits in one chip

    智能功率集成電路spic （ smartpoweric ）是一種將功率器件與低壓邏輯控制電路集成及相關的驅動保護電路集成在一塊晶元上的智能化控制晶元。
  15. It details the ic design process and vlsi circuits, including gate arrays, programmable logic devices and arrays, parasitic capacitance, and transmission line delays

    它詳細規定了集成電路設計過程和超大規模集成電路電路，包括門陣列，可編程邏輯器件和陣列，寄生電容，及輸電線路的延誤。
  16. Low power vlsi designs can be achieved at various design levels, which rang from circuit, logic, architecture and algorithmic ( behavioral ) levels to system level, according to the down - top design flow

    超大規模集成電路低功耗設計可以在不同的設計層次進行考慮，自下而上分可以分為：物理層、邏輯層、結構層、演算法（行為）層和系統層。
  17. Due to the continuous efforts of utilizing the new achievements of electronics, such as the low power integration circuits, the programmable devices and the new mcu, rapid progress has been made in the area of nuclear data acquisition

    由於不斷引進電子學領域的新成就，如採用新型低功耗集成電路，可編程邏輯器件和單片機技術等，核數據採集領域取得了迅速的發展。
  18. Common people enjoy the convenience made by the popularization of these standards, while the development of very large scale integrate circuit ( vlsi ) and programmable logic device ( such as fpga etc. ) makes real - time video compression and transportation possible

    超大規模集成電路技術（ vlsi ） 、可編程邏輯器件（ fpga等）和嵌入式開發平臺的發展使實時的視頻壓縮、傳輸和操控成為可能。
  19. Its driver control logic was realized by means of digital integrated circuit in which the pld chips utilized as the carrier. the vhdl, which is the ieee standard design language of integrated circuit, is used as the behavior description language. the compilation, synthesis, simulation and programming are fulfilled in the maxplusii

    設計的重點是驅動板，其驅動控制邏輯以pld晶元為載體通過數字集成電路方式實現，控制邏輯的功能設計是用ieee標準的集成電路設計語言vhdl作為行為描述語言，在maxplus武漢科技大學碩士學位論文環境中進行編譯、綜合、模擬和晶元編程。
  20. The design of cdma terminal chip is a very actual value and extensive application problem in the field of cdma technology application. with the development of micro - electronics technology, the design of integrated circuit has stepped into the age of soc ( system on chip ), which provide a brand - new method for cdma communication system project. in this paper, a design of cdma2000 1x spread modulation soc has be researched with large scale field programmle gate array device, and make a certain results

    Cdma終端晶元設計是cdma技術應用領域中一個具有重要實際應用價值和廣闊應用前景的研究課題。隨著微電子技術的發展，集成電路設計進入了片上系統時代，這為cdma移動通信系統設計提供了一個全新的技術手段。本文將基於cdma技術，用大規模可編程邏輯器件對第三代移動通信cdma20001x的擴頻調製片上系統設計做了進一步的探討和研究，並取得了一定的成果。
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