bus speed 中文意思是什麼

bus speed 解釋
總線速度
  • bus : n (pl busses buses)1 公共馬車;公共汽車;客機。2 〈口語〉汽車,機器腳踏車;飛機。3 【電學】信息...
  • speed : n 1 快,迅速。2 速率,速度。3 (汽車的)變速器,排擋。4 (膠片,照相紙)感光速度。5 〈古語〉興隆...
  1. As a new interface caters for rapid development of computer peripheral equipment, universal serial bus ( for short usb ) dispels astriction of communication through traditional serial port and parallel port. it is very suitable for real time image data transmission, which requires high speed. this theme describes two - circuit systems, which utilize usb interface to data from a digital image sensor to pc

    為了迎合計算機上設的快速發展以及消除計算機外設通過串、並口的通訊的局限性,出現了新的計算機外設介面usb (通用串列總線) ,這種新型介面對于實時的視頻傳輸很適用,本文設計了兩套電腦眼基於ez - usb2131q的usb介面系統。
  2. And the traffic is very convenient ; there are the buses direct to railway station, bus station, steamboat dock as well as guanqian, stone road and other suzhou industrial park district, vicinal east central links with huning high - speed and sujiahang high - speed ; it can take the convenient for the friends from driving for the better parking condition

    交通便利,有公交車直達火車站汽車站和輪船碼頭以及觀前石路等蘇州著名商業區,附近的東環高架可與滬寧高速和蘇嘉杭高速相連接較佳的停車條件,可以為自駕車的朋友提供便利。
  3. The subject has mainly finished designing and debugging software and hardware of a / d decode module, fpga video processing module, video data frame deposit module, base clock produce module, d / a encode module, i2c bus control module, etc. a / d decode module gathers analog tv signals and realize video decode ; fpga video processing module deals with the data after decoding and produces systematic logic control signal ; video data frame deposit module offers the buffering area to a large n umber of high - speed video data ; base clock produce module through input basic video signal offers system accurate relevant synchronous signal ; under control of video processing module d / a decode module convert digital video data into compound tv signal which can be shown in tv directly ; i2c bus control module is used to initialize the chip of system by simulating i * c bus timing

    本課題主要完成了a d解碼模塊、 fpga視頻處理模塊、視頻數據幀存模塊、基準時鐘產生模塊、 d a編碼模塊、 i ~ 2c總線控制模塊等部分軟、硬體設計及調試。其中a d解碼模塊採集模擬電視信號實現視頻解碼; fpga視頻處理模塊對解碼后的數據進行去噪處理的同時還負責系統的邏輯控制;視頻數據幀存模塊為大量高速的視頻數據提供緩沖區;基準時鐘產生模塊通過輸入基準視頻信號為系統提供精確的相關同步信號; d a編碼模塊在視頻處理模塊的控制下把數字視頻數據轉換成復合電視信號供顯示用: i ~ 2c總線控制模塊模擬i ~ 2c總線時序實現對系統中編、解碼晶元的初始化。
  4. Frequency adjust potentiometer a frequency adjust potentiometer is used to manually bring the frequency ( speed ) of the incoming set to that of the bus for synchronizing purposes

    頻率調整電位器頻率調整電位器是用於手動調整輸入機組的頻率使之與母排同步。
  5. And the setting standard of bus lane is also studied, which includes the standard of bus speed, the standard of bus flow rate, the standard of road condition. moreover the bus signal priority and the pre - signals are introduced and the bus priority network is planned by using the planning method of urban mass transit network. finally the methods of benefit assessment of bus lane, bus approach lane and bus transport priority network are studied, which takes the travel time of each person as standard

    系統地討論了公交專用道、公交專用進口道、公交停靠站的設計方法和它們之間的關系;研究了公交專用道的設置標準,其中包括:車速標準、公交車流量標準和道路條件標準;對公交優先信號、公交預先信號進行了介紹;應用軌道交通線網規劃的方法對公交優先通行網路進行規劃;以人均出行時耗為指標對公交專用道、公交專用進口道、公交優先通行網路的效益評價方法進行了研究,並且建立了數學模型。
  6. Bus speed limits

    公車速限
  7. Drives whose native transfer rate exceeds 50 percent of the scsi bus speed must be on a dedicated scsi bus to avoid loss in performance

    本機傳輸速率超過scsi總線速度的50 %的驅動器必須在專用scsi總線上。
  8. Finally, we can not use electric power but the engine of bus or subsidiary engine to drive air compressors of bus air conditions. because the change range of turnaround speed of engine is very wide, that brings difficulties in controlling the rate of flow of cold - producing medium. in the control of bus air - conditions, preventing evaporator from freezing to make the air - conditions work with high efficiency and controlling the temperature of railway carriage are the basic tasks in air - condition control

    與一般的建築空調相比,汽車空調的工作環境惡劣,條件差,控制難度要增加很多,主要體現在以下幾個方面:一是車外熱負荷變化大,難以確定控制參數;二是要求空調負荷大,而且要控制空調使其降溫迅速:三,不便於用電力作為動力源,必須用汽車發動機或輔助發動機來帶動壓縮機,當採用汽車發動機作為動力源時,由於汽車的車速變化大,發動機轉速的變化可從600r min到4000r min ,壓縮機轉速與發動機轉速成正比,其轉速變化高達7倍,給空調系統製冷劑流量控制帶來困難。
  9. This thesis first comprehensively introduced the domestic and international present research state and the development trend of the fem ( finite element method ) in the city bus design and the stress analysis research. it elaborated the application of the fem in the strength and stress concentration analysis of the bus body frame. the domestic research started later than abroad lags behind now, so we need to expedite the research speed to catch up the level of the international research

    本文首先較全面地介紹了國內外客車設計與應力分析中應用有限元法進行研究的現狀和發展趨勢,論述了有限元法在客車車身骨架強度和應力集中分析中的應用,並闡明國內起步較晚所以與國外研究水平存在一定的差距,需要加快研究速度迎頭趕上。
  10. Firstly, the airborne electromechanical system, the development of bus protocol, power line channel and power system are described in the dissertation ; secondly, the algorithm of qpsk and root raised cosin are discussed ; thirdly, the designation of the hardware and software of the modem board, based on qpsk, built up with dsp and cpld are given. the high - speed data transporting card of airborne electromechanical communication system, which is based on plc, are put forward in our country

    本文介紹了飛機電力線載波數據通信系統的結構,並對低壓電力線的通道特性進行了分析;對qpsk調制演算法及均方根升餘弦低通濾波演算法進行了詳細論證;設計出基於qpsk的調制解調模塊,並在此基礎上,研製出以dsp和cpld為最小系統的調制解調硬體電路板,開發了調制解調模塊電路板的應用軟體程序。
  11. This high - speed data acquisition card designed is based on pci bus and have high capacity memory interface. it combines high - speed date acquisition and high capacity real - time memory

    為此,本文設計了一款基於pci總線且具備可擴展大容量存儲設備介面的高速模擬信號採集卡,將高速數據採集和大容量實時存儲結合在一起。
  12. In the fourth chapter, we consider the effect of bus stations on traffic flow. by numerical simulations, we attain the idea results. in the fifth chapter, a multi - speed ca traffic flow model on the one - dimen - sional urban main road on the control of traffic lights is proposed to simulate the traffic under the open boundary conditions

    最後,建立一個交通燈控制下城市主幹道單車道多速元胞自動機交通流模型來模擬在開放性邊界條件下現實城市主幹道交通的車流運動,通過延遲來調整交通中紅綠燈對主幹道車流量的控制,並研究了在交通燈延遲控制下綠信比、交通燈個數對主幹道交通流的影響。
  13. Further investigated and analyzed composition structure and flow data that dsa ' s formation of image is systematic at first in this paper, carried on intact summing up to the data in the system, having given out the plan of design of high speed and large capacity data channel of digital formation of image system of x - ray ; deeper discussion of control way on sdram, give solution that many pieces of sdram works togetherses of realizing heavy capacity, designing of heavy capacity deposit board realize storing at a high speed to vision data by frame on the basis of this ; through further investigations of interface of pci bus, optimize back end state machine design and urge procedure making with lower, giving intact pci interface scheme that realize high speed dma data transmission and satisfy request of video transmitting ; further investigate the figure systematic design method of programmable logic devices, due to the difficult point of drifting about of enabled signal in fifo in common use and setting up and keeping of output signal, method has been proposed of improving stability of system making use of signal utilizing the phase locking ring in fpga to offer a lot of clocks to move thus realize coordinating the data between every module of system to transmit at a high speed by making use of fifo

    本文首先對數字減影血管造影( dsa )成像系統的組成結構和數據流向進行了深入研究和分析,並對系統中的數據流向進行了完整的歸納和總結,給出了x線數字成像系統中的高速大容量數據通道的設計方案;在對sdram的控制方式做了深入探討后,給出了實現大容量多條sdram共同工作的解決方案,在此基礎上設計了大容量幀存板實現對圖象數據進行高速存儲;通過對pci總線介面的深入研究,優化後端狀態機設計和低層驅動程序開發,給出了完整的pci介面方案實現高速dma數據傳輸,完全可以滿足視頻傳輸要求;深入研究了基於大規模可編程器件的數字系統設計方法,針對通用fifo使能信號漂移、輸出數據難于建立和保持等設計難點,提出了利用fpga中的鎖相環提供多個時鐘相移的信號來提高系統穩定性的解決方案,從而實現利用fifo來協調系統各模塊之間的數據高速傳輸。
  14. Through analysising the characteristics of the power system with floating neutral point deeply, the paper puts forward a new plan of single - phase to ground fault line selection on the base of s ' s signal injecton method and gives the hardware and software design. in this design, the high speed sampling and data processing is carried out through using dsp processor ; the large electrice current is drived through the application of a high - performance audio power amplifier and transformer ; the communication between host computer and detectors is realized through rs485 bus technology ; the difference multilevel frequency - selected amplifier is designed and the feeble signal of space is sampled on the base of the theory of magnetic induction ; the interface between dsp and exterior chip and rs485 interface logical is designed through using fpga ; the using of lcd module and keyboard interfacing chip makes the interface between human and machine ; the programme of host computer and detectors is designed through using blocking design method

    在本設計中,採用高速的dsp處理器,實現了對故障特徵信息的高速採集與處理;採用大功率的功放晶元與變壓器配合的方法,實現了大電流信號的驅動輸出;採用485總線技術,組建了裝置主機與多探測器之間的主從式通訊網路,實現了多干擾條件下裝置主機與多探測器的可靠通訊;設計了差分式多級選頻放大電路,採用磁感應的方法實現了對空間微弱信號的接收;利用fpga技術,實現了控制器與多外設的介面及數字信號的串並轉換;採用了先進的lcd液晶顯示模塊及鍵盤介面晶元,設計了人機信息交互的介面;採用了模塊化的軟體設計方法,開發了裝置主機及探測器的軟體程序。
  15. On basis of the development of modern control technology and apply of the network technology and locale bus - mastering technology , this text analyzes the essential element for produce of wire - roll mill : principle of assign for speed ; expatiates in detail on the network structure and communication protocol of ethernet and profibus - dp ; concretely describes the forms of control system configuration , the function and features of its software and hardware designs ; also, introduces mainly control function of control system, , for example , sequence control 、 loop control 、 fly shear control and operation and monitor function etc

    基於現代控制技術的發展、網路技術以及現場總線技術的應用,本文分析了線材生產的基本要素:速度的分配原則;分析了工業以太網ethernet和現場總線profibus - dp的結構和通訊協議。主要說明plc控制系統的組織結構形式,系統的軟硬體設計的功能和特點。同時,詳細介紹了控制系統的主要控制功能,如邏輯控制、活套控制、飛剪控制以及操作監控功能等等。
  16. Ieee 1394 is a high - speed serial bus standard which supports data speed up to 400mbps, hot - pluggable and has two types of data transfer : asynchronous and isochronous. all these characters make it be considered the first choice of near - term on - board spacecraft architectures for data transfer

    而ieee1394高速串列總線具有支持400mbps的等時和異步傳輸,可熱插拔,使用方便靈活等特性,使其成為未來星載高速總線的首選。
  17. The data show the fact that the working conditions of the city bus exist lower speed driving, frequent acceleration and long - range engine idle operation which lead to bad fuel economy and emission

    通過這些數據的處理分析,表明城市公交客車低速行駛、頻繁起步以及滑行和駐車的發動機怠速普遍存在著燃油經濟性差和排放惡劣的狀況。
  18. Design of high - speed image acquisition system based on usb bus

    介面的高速圖像採集系統設計
  19. The dissertation discusses the technology of pci bus, new generation technology of high speed interconnect bus ? ? starfabric technology and fiber transmission technology

    本論文討論了pci總線技術,新一代高速互連總線技術? ? starfabtic技術以及光纖傳輸技術。
  20. The key technology of high speed data - distribution system is not traditional pci bus technology, but new generation of interconnect bus technology ? ? starfabric technology

    數據分發系統的核心技術是新一代的互連總線技術? ? starfabtic技術,而不是傳統的pci總線技術。
分享友人