parallel architecture system 中文意思是什麼

parallel architecture system 解釋
并行結構系統
  • parallel : adj 1 平行的；并行的 （to; with）; 【電學】並聯的。2 同一方向的，同一目的的。3 相同的，同樣的，相...
  • architecture : n. 1. 建築學。2. 建築（樣式、風格）；建築物。3. 構造，結構；【自動化】（電子計算機的）架構，體系結構。
  • system : n 1 體系，系統；分類法；組織；設備，裝置。2 方式；方法；作業方法。3 制度；主義。4 次序，規律。5 ...
  1. It preestablish a parallel design pattern for each parallel project based on master / slave architecture, and the communication between computers is transparent to programmers. in another words, when programmers are developing parallel programs, they do n ' t need to learn any complicated primitives and write any codes related with communication between parallel tasks. just only set some parameters in the visual interfaces that provided by platform, and the codes will be generated by our system automatically and inserted to the fittest place in the files

    系統為每一個并行計算工程設定了一個基於master slave架構的并行編程模型，並且使得各結點機之間的通信對于開發人員透明化，也就是說，開發人員在開發并行程序時，無需了解紛繁復雜的通信原語，不涉及任務之間通信的代碼，只需要在并行程序開發平臺提供的可視化界面上對數據的傳送進行設定，通信代碼將自動生成並插入到程序合適的地方。
  2. On the other hand, boundary - scan technique intelligent fault diagnostic method was applied to practice. for most digital system, devices with boundary - scan architecture are broadly used. only using four line or five line to connect pc parallel port with cut tap ( test access port ), all the ptvs can be loaded to cut and all homologous prvs can be taken back to intelligent fault diagnosis system

    至於本文採用邊界掃描測試故障診斷技術，是考慮到本系統的通用性和簡潔性，因為對于大多數數字系統而言，具有邊界掃描結構的器件己廣泛應用，本文只需4條或5條信號線就能將pc機和被測邊界掃描電路連接起來，由此極大地簡化了智能故障診斷系統中為實現ptvs加載和prvs獲取而專門設計的介面板電路。
  3. According to characteristic of parallel mechanism and the different control rule between traditional nc machine and parallel nc machine, the cnc system with open modular architecture has been set up. because the software module and hardware module have been designed based on standardization and diversification, the deviser can set up system with different module such as building block

    根據並聯實驗平臺的結構特點以及它與傳統機床控制規律的不同，本文採用開放式、模塊化體系結構建造數控系統，在標準化與多樣化的基礎上設計了軟、硬體模塊，這樣就可以通過加減配置不同的模塊來構造數控系統，實現系統「積木式」的集成。
  4. It makes it possible to form a distributed parallel computing architecture for the inherently distributed power system

    這使得針對地域性較強的電力系統形成分散式并行計算體系結構成為可能。
  5. In the first part of this paper, different kinds of usual network architecture of parallel - processing multi - processors are studied. based on adsp - 21160 serial digital signal processors from ad company, close - coupled flexible hardware network architecture is selected as the network architecture of the system, because of which the hardware logical architecture of the system can be recomposed on line according to the acquirement of different algorithms

    本文第一部分研究了各種常見的并行處理網路結構，基於ad公司的adsp - 21160系列數字信號處理晶元，選擇緊耦合的柔性硬體結構作為該系統的并行處理結構，使得系統的硬體邏輯結構可以根據演算法的要求在線重組。
  6. The topic is from the national " 973 " project " the new principles and methods of high - performance electronic components of digital product design manufacturing ". closely combing with the high - speed high - precision planar parallel position robot developed by the project, we have carried out a deep research on robot control system architecture, time - optimal control algorithm and servo system control algorithm, achieving high - speed and high - precision point to point control and trajectory tracking control

    本課題來源於國家「 973 」計劃項目「高性能電子產品設計製造精微化數字化新原理和新方法」 ，密切結合該項目所開發的高速高精度平面並聯定位機構，對機器人控制系統體系結構、時間最優控制演算法以及伺服系統控制演算法進行了深入的研究，實現了高速度、高精度的點位控制和軌跡跟蹤控制效果。
  7. Then, this thesis implements this system by the design of the architecture, and chiefly describes the parallel - job scheduling model of the loading system, implement the coordinated scheduling between the loading tasks in multi - resource database system

    而後本文基於該體系結構設計並實現了該系統，並著重描述了加載系統的并行任務調度模塊，實現了多資源數據庫系統下的加載任務之間的協同調度。
  8. The ordinary research of parallel computer architecture share i / o system cannot be used here, and these theories did not consider the real time requirement of real time tasks

    通用并行體系結構下共享i / o的研究成果不能普遍適用，並且沒有考慮星載計算機系統中的任務對于實時性的要求。
  9. With phased array radar observing target ' s improvement of different performances of the aircraft, the deterioration of the working environment of radar and improvement of the radar demand request more and higher for putting forward the equipment of phased array radar video signal processing. the digital signal processing is all the time the developing direction of radar signal processing, its main shortcoming is that the increase processing precision, and the amount of information at the same time bring on the amount processing redouble, method to solve this problem is the real - time high speed digital signal processing system. presently multi - processors parallel processing is the focus of the field of high - speed real - time processing. this paper ' s background is the high - speed real - time signal processing of phased array radar. a parallel computing system designed with 4 adsp - 21060 analog device inc ' s dsp is presented. lt has fully utilized the dsp ' s characteristic to be supported the parallel computing, and formed a mes h architecture. this paper design and discusses this system in terms of design for test ( dft ) and real time operation system ( rtos ), and have put forward the new solution for the design and development of the high - speed real - time signal processing system. then, analysed the subject matter faced at the same time

    本文以高速實時相控陣雷達視頻信號處理為背景，提出了一種由4片ad公司adsp - 21060構成的并行計算系統。它充分利用了adsp - 21060支持多處理器并行計算的特點構成了一種網格結構，並且從可測性設計、實時操作系統角度對該系統進行了設計與討論，為高速實時信號處理系統的設計與開發提出了新的解決方案，同時分析了面臨的主要問題。本文首先分析了相控陣雷達信號處理單元的特點，然後針對適合於片間并行的adsp - 21060討論了并行計算結構，提出了一種採用四片adsp - 21060構成網格結構的信號處理平臺，分析了它的工作原理。
  10. Finally, a new performance model of multi - dsp system architecture and task allocation and schedule is presented in virtue of distributed finite state machine ( dfsm ) and vhdl environment. chapter 1 gives a comprehensive description about the significance of research and the current research status of real - time dsp, parallel processing, fpga co - processor and vxi virtual instrument technology

    第?章緒論部分闡述了選題的意義，介紹了高性能信息處理領域內實時信號處理技術、并行處理技術、 fpga技術和vxi總線技術的研究與發展現狀，並介紹了課題提出的背景與主要研究內容與任務。
  11. This parallel processing system can be easily expanded to more complicated architecture to adapt to the various parallel algorithins. in this paper, the main works are as fol1owsf 1. a para1lel signal processing system with four adsp2l060 processors has been developed

    本設計開發的并行處理機具有良好的可擴展性，可擴展成具有復雜拓撲結構的信號處理機以適應不同規模的并行演算法的要求。
  12. Finally discusses several class different multi - dsp extended architecture based on vvp platform. chapter 3 analyzes the significance of dynamic reconfiguration of multi - dsp parallel processing system, introduce run - time reconfiguration technique of fpga. with comparison of the common used dynamic communication network in parallel processor system, proposes the new dynamic reconfigurable multi - dsp system architecture based on run - time reconfigurable fpga

    第三章分析了多dsp并行系統體系結構動態可重構的意義，介紹了fpga動態配置技術，比較了現有的一些多處理器動態互連的設計實現方法，在此基礎上，提出了利用局部動態重構fpga技術設計實現實時動態可重構多sharc功能系統的新方法。
  13. At the same time, this thesis has analyzed the programming method of parallel computing system based on network and optimized the original distributed architecture of surface vessel command and control system which is studied in this thesis according to parallelism, and provided a distributed network parallel architecture which is adapt to operational requirements of actual navy surface vessel command and control system, and discussed the feasibility and performance predominance of this kind of architecture

    同時，本文還深入分析了基於網路的并行計算系統程序設計方法，對本課題所研究的艦載指控系統原有的分散式體系結構按照并行化的思想進行了優化；提出了一種適合目前海軍艦載指控系統作戰要求的分散式網路并行體系結構；討論了這種體系結構的可行性和性能優勢。
  14. The distributed networked parallel architecture and load balance resolution scheme which is adapt to this kind of architecture have been simulated on the surface vessel command and control system artificial platform, and the experiment shows that the performance of the surface vessel command and control system is higher than that of the original distributed system by making use of this kind of method and proves that the method discussed in this thesis has some practical value

    本文所提出的分散式網路并行體系結構和適應于這種體系結構的負載平衡方法在艦載指控系統模擬平臺上做了模擬試驗，證明這種方法的應用使艦載指控系統在性能上比原有的分散式系統有所提高，從而驗證了本文所提出的方法具有一定的實用價值。
  15. In general, fpga is mostly used in high - speed communications systems or high - speed signal processing systems because of its high - speedly and parallel architecture. however, in this thesis, it was applied to a low - speed and low power consumption system - a underwater long - range remote control reception system to realize decoding of remote control instructions in the frequency domain, and made the satisfactory result

    一般來講， fpga多用於高速通信和高速信號處理領域，以發揮其處理速度快的特點，本文將其應用於一低速低功耗系統? ?某水下遠程遙控接收系統，主要用其在頻域來實現水下遠程遙控的解碼，取得了令人滿意的效果。
  16. So the egress of digital processing system lies in the parallel architecture

    因而其信號處理機的出路在於體系結構的并行化。
  17. At last, it describes the scalable parallel architecture of advanced wp system based on multiple sharcs

    最後分析了基於多sharc的vvp可擴展并行處理系統的組成方式和結構特點。
  18. The thesis analyses the key technology of computer parallel architecture by constructing a system for dual - computer system parallel processing

    本文通過構建一個并行處理雙機系統分析了計算機并行系統的關鍵技術。
  19. The video server with parallel architecture can extend the area of video service system, because it can disperse users " requests and reduce the local load of server and local traffic of networks

    採用并行服務器體系結構可以分散用戶請求、減輕服務器局部壓力和網路局部流量，擴大視頻應用的規模。
  20. A study on parallel service system architecture of rs image based on svm

    的遙感數據并行服務體系研究
分享友人
分享到 Line

分享到臉書