譯碼器部件 的英文怎麼說
中文拼音 [yìmǎqìbùjiàn]
譯碼器部件
英文
translator unit- 譯 : 動詞(翻譯) translate; interpret
- 碼 : Ⅰ名詞(表示數目的符號或用具) a sign or object indicating number; code Ⅱ量詞1 (指一件事或一類的...
- 器 : 名詞1. (器具) implement; utensil; ware 2. (器官) organ 3. (度量; 才能) capacity; talent 4. (姓氏) a surname
- 部 : Ⅰ名詞1 (部分; 部位) part; section; division; region 2 (部門; 機關或組織單位的名稱) unit; mini...
- 件 : Ⅰ量詞(用於個體事物) piece; article; item Ⅱ名詞1. (指可以一一計算的事物) 2. (文件) letter; correspondence; paper; document
- 部件 : component; unit; parts; assembly; subsystem; secundina (pl. secundinae)
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Jx5 is a complex microprocessor, which contains cache, microcode rom, instruction prefetch unit, instruction decode unit, integer unit, mmx unit, floating point unit, page unit, bus unit, dp logic, apic and so on. it is very difficulty to test a such complicated microprocessor and receive anticipative fault coverage ratio. so, we must add dft in cpu ’ design
Jx5微處理器是一款結構異常復雜的微處理器,它的內部包含有: cache 、微碼rom 、指令預取部件和動態分支預測部件、指令譯碼部件、整數部件、多媒體部件、浮點部件、分段和分頁部件、總線介面部件、雙處理器介面部件、可編程中斷控制部件等。The designing process of the edac circuit is described in the paper. the time simulation is analysed, too. the designment of the circuit has access the hardware debug, and can woks normally
此外還將第一輪設計中的基本邏輯器件如與、或、非門以及諸如244 、 255 、譯碼器等小規模元器件都集成到fpga內部來實現。Abstract : the paper presents the method with the encoder and decoder instructions, with the switch of bcd in possession of six input points to realize the externally setting up in the device parameter in plc of multibit data
文摘:本文提出應用數據編碼指令和數據譯碼指令,用一位bcd碼開關,佔用六個輸入點,實現多位數的plc器件參數的外部設定方法。Moreover, ck510 employs some low - power design techniques with performance improved. there are three instructions controlling power consumption on system - level and gated clock technique is widely used in ck510. integer computing ability is very important for embedded cpu
在嵌入式處理器中,整數單元一般進行指令譯碼、指令發射和指令執行,是處理器中的一個重要部件,它直接影響著處理器的性能( cpi ,每條指令花費的時鐘周期)和功耗指標。The paper is completed research of measurement and control system based on dsp under technology. the paper is designed a card with the data - collection conversion and control by adopting mainly tms320f240 among the dsps as kernel processor, with peripheric a / d and d / a circuit epm7128 ' s decode and latch circuit and isa interface circuit
本論文主要是採用數字信號處理器dsp中的tms320f240作為核心處理器,結合外部的模數轉換和數模轉換電路、可編程邏輯器件epm7128的地址譯碼和鎖存電路和isa介面電路,設計了集採集、轉換、控制於一身的isa卡。Listing 1 gives the source code for a very short class, along with a partial hexadecimal display of the class file output by the compiler
清單1提供了一個(非常)簡短的類的源代碼,還附帶了由編譯器輸出的類文件的部分十六進制顯示:With software and hardware co - design method, this paper proposes an algorithm to calculate register lifetime in programs, and the control of writing results back into rf is implemented through an enable control signal provided by instruction encoding at compile time
基於軟硬體協同設計的思想,在研究局部變量生存期演算法的基礎上,本文提出了通過編譯器指令編碼實現對硬體結構的使能控制,即控制流水輸出結果是否寫回寄存器文件,以減少對寄存器文件的寫次數,從而降低寄存器文件埠的讀寫壓力。A " major component ", in this context, means a major essential component ( kernel, window system, and so on ) of the specific operating system ( if any ) on which the executable work runs, or a compiler used to produce the work, or an object code interpreter used to run it
在這里, 「主要部件」指的是在該可執行作品下運行的作業系統(如有的話)當中的一個主要且不可或缺的部件(如核心、視窗系統等) ,或用以產生該作品的一個編譯器,或用以執行該作品的目標碼解析器。Describes the compiler, which creates an object file containing machine code, linker directives, sections, external references, and function data names
描述編譯器,編譯器用於創建一個包含機器碼、鏈接器指令、節、外部引用和函數/數據名的對象文件。When using visual studio. net to create xml web services in managed code, you use a standard deployment model : you compile your project and then you deploy the resulting files to a production server
當使用visual studio . net創建託管代碼中的xml web services時,您使用標準的開發模型:編譯項目,然後將最終文件部署到成品服務器上。項目Then, the author specially studies the characteristic of system architecture of the dsp, paints schematic principle diagram and pcb diagram of the hardware circuit system, writes the program decoding and partial data processing of the cpld, adopting verilog hdl hardware describing language
然後,研究了dsp晶元結構體系的特點,繪制了硬體電路系統的原理圖和pcb圖,且採用veriloghdl硬體描述語言編寫了復雜可編程邏輯器件( cpld )的譯碼與部分數據處理程序。分享友人