接收轉換器 的英文怎麼說

中文拼音 [jiēshōuzhuǎnhuànqì]
接收轉換器 英文
receiving converter
  • 接 : Ⅰ動詞1 （靠近;接觸） come into contact with; come close to 2 （連接; 使連接） connect; join; put ...
  • 收 : Ⅰ動詞1 （把攤開的或分散的事物聚集、合攏） put away; take in 2 （收取） collect 3 （收割） harvest...
  • 轉 : 轉構詞成分。
  • 換 : 動詞1. （給人東西同時從他那裡取得別的東西） exchange; barter; trade 2. （變換; 更換） change 3. （兌換） exchange; cash
  • 器 : 名詞1. （器具） implement; utensil; ware 2. （器官） organ 3. （度量; 才能） capacity; talent 4. （姓氏） a surname
  • 接收 : 1 （收受） receive; reception; accept; [電學] receipt; receiving 2 （接管） take over; expropriat...
  • 轉換器 : -ad
  • 轉換 : change; transform; convert; switch
  1. In this method of measuring time - resolved spectrum, a special light beam modulator translates the time - distribution of an optical spectrum into a space - distribution of light intensity of the light beam, and the space - distribution spectrum is dispersed by a multi - spectrometer, then it is detected by an ordinary 2 - d ccd array detector

    瞬態時間分辨譜測量方法的主要思想：使用特殊光束調制器把光譜隨時間的變化過程轉化為光強的空間分佈，經色散后，以二維探測器接收並轉換光信號為電信號，用通用計算機控制採集並處理光譜數據。
  2. To utilize the advantages of dsp chips, the system should be computing sources economical. according to digital signal processing theory, the poly - phase fir can help reduce the workloads of the ddc / duc. therefore, adding the complex carrier mixers, the channelization system ( a method of using a single wideband facility to transmit many relatively narrow - bandwidth signals. by subdividing the frequency spectrum used in the wideband channel ) can be formed utilizing the characters of fft

    為了使開發出的軟體可以適用於高速dsp器件開發，節省系統資源，課題首先從數字信號處理的理論進行分析，得出可以利用抽樣率轉換的數字濾波器的特點，即多相濾波實現數字上下變頻計算負擔的減小，之後進一步將多相濾波器與頻譜搬移部分結合，通過公式的推導，得出可利用快速傅立葉變換的特點實現多路信號的通道化發射和接收的處理模型。
  3. Through analysising the characteristics of the power system with floating neutral point deeply, the paper puts forward a new plan of single - phase to ground fault line selection on the base of s ' s signal injecton method and gives the hardware and software design. in this design, the high speed sampling and data processing is carried out through using dsp processor ; the large electrice current is drived through the application of a high - performance audio power amplifier and transformer ; the communication between host computer and detectors is realized through rs485 bus technology ; the difference multilevel frequency - selected amplifier is designed and the feeble signal of space is sampled on the base of the theory of magnetic induction ; the interface between dsp and exterior chip and rs485 interface logical is designed through using fpga ; the using of lcd module and keyboard interfacing chip makes the interface between human and machine ; the programme of host computer and detectors is designed through using blocking design method

    在本設計中，採用高速的dsp處理器，實現了對故障特徵信息的高速採集與處理;採用大功率的功放晶元與變壓器配合的方法，實現了大電流信號的驅動輸出;採用485總線技術，組建了裝置主機與多探測器之間的主從式通訊網路，實現了多干擾條件下裝置主機與多探測器的可靠通訊;設計了差分式多級選頻放大電路，採用磁感應的方法實現了對空間微弱信號的接收;利用fpga技術，實現了控制器與多外設的介面及數字信號的串並轉換;採用了先進的lcd液晶顯示模塊及鍵盤介面晶元，設計了人機信息交互的介面;採用了模塊化的軟體設計方法，開發了裝置主機及探測器的軟體程序。
  4. Thirdly, the relative theories of the limiter and rectifier are studied. in order to make the passive responder work stably under the conditions of large dynamic range of the receiving power and the high efficiency requirement, a two - stage limiter circuit and a voltage - doubler rectifier circuit with several diodes parallel are developed

    3 ，對應答器地面裝置中的能量轉換電路進行了研究，針對應答器地面裝置接收到的載波功率具有大動態范圍的特點以及系統能量轉換的高效率要求，設計了一種兩級級聯二極體限幅電路和多管並聯的倍壓整流電路。
  5. In both radio and television receivers, once the basic signals have been separated from the carrier wave they are fed to a loudspeaker or a display device ( usually a cathode - ray tube ), where they are converted into sound and visual images, respectively

    在無線電和電視兩個接收器中，一旦基本信號與載體電波分離，即被供于擴音器或顯示設備（通常是陰極攝像管） ，在那裡它分別被轉換成聲音和可視圖像。
  6. In the transmiting port, optical encoder turns data bits into spread spectrum sequences, then, optical decoder retverts it to data bits with the theory of correlation decoding in the receiving port

    在發送端光編碼器將數據比特轉換成擴頻序列，在接收端光解碼器利用相關解碼原理將擴頻序列恢復為數據比特。
  7. This thesis focuses on the ingress process module of ctu, which translates c - 5 dcp format to rainier 4gs3. the specification analysis, architecture and logic design, functional simulation testbench design, synthesis report and testing result are discussed in this thesis. the research work mainly includes : the specification analysis and design requirements of ctu logic ; the architecture and logical design of ingress process module, which includes receive control fsm, send control fsm and cell position adjustment logic ; the performance improvement of ingress process module to receive and transmit data cell at the full line speed

    本論文的主要研究工作包括：通信協議轉換邏輯的功能分析和設計需求；通信協議轉換邏輯上行方向的系統分析及體系結構設計，包括上行接收狀態機、發送狀態機、信元內位元組位置調整機制等的設計；通信協議轉換邏輯上行方向的線速設計，主要是上行接收的線速設計，要使用流水設計技術；提出了高速實現roundrobin調度策略的實現方法，並設計實現了桶式移位器和優先級編碼電路；應用bfm模擬模型設計了上行處理各模塊的模擬testbench ，完成了各級模塊的模塊模擬和系統集成模擬。
  8. Receiving antennas intercept part of this radiation, change it back to the form of electrical signals, and feed it to a receiver

    接收天線的裝置接收部分電磁波，將其轉換回電子信號，並供給一個接收器。
  9. In automation control system, the actuator receives signals from controller or the manual operation, transfers them to the servomechanism ' s output. in that way, actuator adjusts the manipulated variable

    在自動控制系統中，執行器接收來自控制器的自動調節信號或手動操作信號，將其轉換成調節機構動作的輸出，從而改變控制量的大小。
  10. Travel time is the key point of system, its measure quality decides the survey precision of the stress. time to digital convertor ( tdc ) was applied to accomplish the precision time interval measurement. at the same time, one transmitter - two receivers probe arrangement and zero - crossing detecting method were also applied to reduce the errors in measurement

    傳播聲時是整個測量系統中的關鍵量，其測量水平決定應力的測量精度，對此本文採用時間-數字轉換器（ timetodigitalconvertor ， tdc ）完成高精度時間間隔測量，在實現過程中又分別採用「單端發射-雙端接收」的探頭布局模式和「過零檢測」手段來降低系統檢測誤差。
  11. This card largely depends on three integrate chips to fulfill its function : 1 ) nic control main chip, corresponding the mac sublayer of ethernet, to realize csma / cd media access protocol, manage the sending and receiving buffers integrated on the chip and provide motherboard pci interface. 2 ) serdes ( serializing and deserializing ) chip, corresponding pcs and pma sublayers in ethernet, mainly to complete 8b / 10b coding and convert 10 bits parallel data to serial data, and convert them again at the receiving end. 3 ) fibre transceiver unit, completing light - electrical conversion of seri

    該網卡主要由3塊集成的晶元完成其功能，分別是i ）網路控制主晶元，對應于以太網的mac子層，主要完成csmaicd介質訪問協議，管理片上集成的發送和接收緩沖區，並提供和主板p0總線的介面： b ） s rd s （串列解串列化器）晶元，對應于以太同的pcs和pma子層，主要完成sb lob編碼並將10位并行的數據轉換為串列數據，在接收端完成相反的功能：涌）光纖收發器，完成串列數據的光電轉換功能。
  12. Modem - an abbreviated term for " modulator - demodulator. " a modem converts digital signals into analog signals ( and vice versa ), enabling computers to send and receive data over the telephone networks

    數據機- -是「調制器和解調器」的縮寫。數據機可將數字信號轉換成模擬信號（反之亦然） ，能使電腦在電話網上發送和接收數據。
  13. If the received matrix is to be outputted to the first type of transform circuit, the first counter writes each matrix element in a particular dual port memory assigned to the quadrant of the matrix element

    假使接收的矩陣將被輸出至第一型式轉換電路，那麼第一個計數器將收到的每一個矩陣元素寫入對應到某一矩陣四分之一象限的特定之記憶體。
  14. Secondly, basing on single channel if sr receiver mathematic model, this thesis has designed if sr receiver subsystem and brought forward its design project and system circuit principle diagram, and explained the system working principle. furthermore, this thesis introduces the working principles and respective applications of wideband high - speed adc ad6640, ddc ad6620 and high - speed dsp tms320c6713 according with the if sr receiver subsystem high - speed analog digital conversion department, digital down conversion department and high speed digital signal processing department. thirdly, the thesis emphatically demonstrates the software realization department of the if sr receiver subsystem, which including ad6620 ' s inner parameter software setup, tms320c6713 data transmission and processing and the quadrant demodulation algorithm program realization

    其次，基於單通道中頻軟體無線電接收機數學模型，本文設計了中頻（ if ， intermediatefrequency ）軟體無線電接收機子系統，給出了中頻軟體無線電接收機子系統的設計方案和系統電路原理圖，說明了系統工作原理，並分別對應系統中的高速模數轉換部分、數字下變頻部分、基帶數字碩士學位論文軟體無線電理論研究及中頻軟體無線電接收機子系統設計信號處理部分，介紹了高速adcad664o ，數字下變頻器（ ddc ， digitaldownconverter ） ad6620 ，高速數字信號處理器（ dsp ， digitalsignalproeessor ） tms320c6713的工作原理，以及它們在中頻軟體無線電接收機子系統中的應用。
  15. Hence, the requirements of the servo control card are getting much sophisticated. in this thesis, the research work and implementation details of a 6 axes servo control card are discussed. this card is based on the ti company ? dsp chip tms320f240 and has realized the following functions : a ) signal encoder, b ) position limit, c ) dual ram communication with cpu, d ) coordinated control e ) dia conversion

    該卡以ti公司的16位定點數字信號處理器tms320f240為核心晶元，實現6路編碼器信號輸入處理，軸限位中斷處理，通過雙埠ram與pc進行通訊，接收pc發送過來的控制指令和數據，完成插補運算、聯動運算等控制，通過d / a轉換電路，將結果轉化為模擬電壓送伺服放大器驅動電機。
  16. In this topic, an adc circuit and data - storage system for all digital ultra - wideband receiver was designed, and the ultra - wideband narrow pulse signal that is received is digitalized, using an ultra - high - speed a / d convertor

    本課題設計了一個全數字化超寬帶接收器的adc電路及數據存儲系統。利用一個超高速的ad轉換器，對超寬帶窄脈沖信號進行數字化。
  17. The up converter receives at its input the if signal coming from the modulator and converts it on the rf transmission channel

    上轉換器在它的來自調節器的輸入if信號上接收和在射頻傳輸頻道上轉換。
  18. The c8051f005 micro - processor made by cygnal company is the core of the lead plane, which connects with half - duplax differential transceiver max3471, sigma - delta ad7705. the pressure, altitude and temperature can all be collected and calculate out accurately

    主機以cygnal公司的c8051f005單片機為核心，外接串口通信收發器max3471 、 a / d模數轉換器ad7705 ，可以實現壓力、高度、溫度數據的採集和較為準確的輸出，同時還具有低電壓報警等輔助功能。
  19. The clock and data pulsation signals from upper sensor heads can be received using pin diode, then, amplified and inverted in logical control unit for the purpose of cpu operation. hereinafter, the digital signal will be delivered into the central processing unit ( cpu ) for related calculation, and meanwhile transmitted to a d / a converter for signal recovery after filter and phase - shift circuit

    通過採用pin管接收從傳感頭傳遞下來的時鐘脈沖和數據脈沖信號，並將它們放大整形傳送到邏輯控制單元，產生邏輯控制信號，再將數字信號傳送給d / a轉換器，設計了濾波器和移相器電路，還原出了原始的被采樣信號。
  20. Specifically, the development of high speed a / d converter, dds technology, as well as the prevalence high speed dsp, fpga have provided a solid hardware function for the radar receiver

    特別是高速多位（ 100mhz ， 12bit以上） a / d轉換器和dds技術的發展以及高速數字信號處理晶元（ dsp ）和fpga的普遍使用，為雷達接收機提供了良好的硬體基礎。
分享友人
分享到 Line

分享到臉書