標量指令 的英文怎麼說

中文拼音 [biāoliángzhǐlìng]
標量指令 英文
scalar instruction
  • 標 : Ⅰ名詞1 [書面語] （樹梢） treetop; the tip of a tree2 （枝節或表面） symptom; outside appearance; ...
  • 量 : 量動1. （度量） measure 2. （估量） estimate; size up
  • 指 : 指構詞成分。
  • 指令 : 1 （指示; 命令） instruct; order; direct2 （上級機關對下級機關的指示） instructions; order; direc...
  1. This thesis will rely on previous studies of instructions on the general rules and language functions, and modification of teacher talk to carry on a multi - layer study on junior middle school teachers " instructions with aspect of linguistic forms and language functions in chinese efl classrooms. after study on the transcriptions of 30 lectures ( 10 lectures are given by in - service teachers, 10 lectures are given by pre - service teachers and 10 lectures are given by the winners in fine - quality classroom competitions ) of efl classroom of junior middle schools in china, the major findings are : ( 1 ) the teachers likely use some devices with respect to prosody ( temporal variables ), lexis, syntax and discourse to simplify and clarify the complex instructions to match the requirement of junior middle school students " listening comprehension. ( 2 ) there are about three factors that cause the ineffective instructions

    本文在前人的關于教師語言的調整，指令語及其表達功能的研究基礎上以何安平教授建立《中學英語教育語料庫（ mstm ） 》中的近17 . 7萬字的子語庫《英語課堂教學語料庫（ msee ） 》為研究語料，選擇了其中30節初中英語課為研究對象，對教師指令語的言語形式及其語言功能進行了較為深入的描述分析，發現： （ 1 ）在音律層面，中國中學英語教師習慣川停頓來放慢語速或在一些難詞之前做停頓以便達到讓學生理解的要求：詞匯層面，教師慣用一些表達方式來給指令語；句法層面，教師也是盡量用簡單句來簡化指令語；語篇層面，初中英語課堂上教師常用一些信號詞來起始解釋性指令語，並少用宏觀語篇標記詞來幫助學生理解，但卻常用微觀語篇標記詞來吸引學生的注意力。
  2. There are five parts in powerpc603e ? microprocessor : integer execution unit, floating point unit ( fpu ), instruction ( data ) cache, bus interface unit and memory manage unit. the instructions are executed with pipeline way

    Powerpc603e微處理器系統由定點執行單元、浮點單元、指令（數據） cache 、總線介面單元、存儲管理單元組成，以流水和超標量方式執行指令。
  3. It has five parts, such as integer execution unit, floating point unit ( fpu ), instruction cache, bus interface unit and memory manage unit. the instructions are executed with pipeline way. the instruction set and i / o signals are compatible with powerpc

    它由定點執行單元、浮點單元、指令cache 、總線介面單元、存儲管理單元組成，以流水和超標量方式執行指令，指令集和介面時序兼容powerpc ，是典型的risc微處理器結構。
  4. Then the thesis presents two peephole optimizations for the c 、 c + + compiler based on the architecture of thump to improve the quality of generated codes. one optimization is on multimedia applications. since thump supports two mmx instructions, the optimized compiler can generate these instructions to improve the performance

    論文討論了如何利用thump體系結構的特點進一步提高目標代碼生成質量的優化技術，並實現了兩種窺孔優化，包括針對thump的多媒體指令的優化演算法和基於thump的高速乘除處理部件的優化演算法。
  5. The design of control and communication software : the software realized the communication of the five bouys with the control vessel and the acoustic emission vessel ; it controls the data acquisition system, it restricts the five bouys in the remote instructions from the control vessel and the acoustic emission vessel, and it also transmits the position and time information from dgps, the bearing information of the underwater acoustic construction from a electronic compass of type of tcm2 when in collection period of time

    控制和通信軟體設計：各浮標工作在指揮船和發射船遙控指令內容的約束下，控制和通信軟體實現了浮標與指揮船以及發射船的通信，控制數據採集系統工作，並在採集時段完成gps位置、時間與矢量水聽器方位信息的傳輸。
  6. Your demands and instructions will be completed by our engineers and computer system, to design your full functioned dy labeling machine like tailor made

    您的要求和指令將會通過我們的工程師和計算機系統完成，量體裁衣，設計出您所需要的功能全的dy貼標機。
  7. The functions of mes at steel companies are introduced, including management of manufacturing standard, scheduling production plan, creation and delivery of production instruction, record of production performance, management of material tracking, judgement of quality design, monitoring of working procedures and equipment operations

    介紹了鋼鐵企業製造執行系統的功能，包括製造標準的管理、作業計劃編制、生產指令生成及下達、生產實績收集、物料跟蹤管理、質量設計判定、工序成本的實時監視和生產設備運行狀況監視。
  8. Superscalar risc microprocessor is the further development of reduced instruction set computer, it improve the instruction - level - parallism by means of adding parallel pipelining function units and dynamic on - chip scheduling. this thesis anslysises the architecture and the diversified techniques of superscalar computer

    超標量risc微處理器是精簡指令結構（ risc ）的進一步發展，它通過增加并行流水執行單元並結合片上硬體動態調度來提高指令并行度。
  9. Target branch to the target instruction at the specified offset if two unsigned integer values are not equal unsigned values

    如果兩個無符號整數值不相等（無符號值） ，則按指定的偏移量分支到目標指令。
  10. Target branch to the target instruction at the specified offset if the first value is less than the second value unsigned values

    如果第一個值小於第二個值（無符號值） ，則按指定的偏移量分支到目標指令。
  11. Based on trace processors, mptp duplicates multiple superscalar processors as processing elements ( pe ), and executes instruction traces in pes

    Mptp處理器以trace處理器為基礎，重復設置多個超標量處理單元，把指令流的多條trace發送到處理單元同時執行。
  12. Compared to its commercial counterparts, the proposed scheme can improve the instruction throughput by 23 %, while maintaining the hardware and power consumption

    實驗表明，相比商業化的處理器，該策略下的超標量結構在保持電路和功耗開銷的同時，指令吞吐率平均有23 %的提高。
  13. In a multithreaded microprocessor which has a superscalar execution core, with the issue width being larger and the pipeline getting deeper, the misprediction penalty will become longer

    在執行單元為超標量結構的多線程處理器中，轉移誤預測損失會隨著指令發射帶寬和流水線級數的增加而增加。
  14. Firstly, for the purpose of research and verification of multithread microprocessor, a superscalar microprocessor model armp - v2 is built on the basis of armp microprocessor ; secondly, the issue logic is not only the critical path in a superscalar microprocessor, but also critical to the performance of a multithreaded microprocessor with superscalar execution core

    首先，在設計的嵌入式微處理armp的基礎上進行改進，提出了一個超標量處理器模型，用於多線程處理器系統結構的研究與驗證。其次，指令發射邏輯是超標量處理器中的關鍵路徑，也是制約執行單元為超標量結構的多線程處理器主頻提高的關鍵因素。
  15. An accuracy of a system is a measure of how well if follows commands

    系統的精度是衡量其是否能夠跟蹤指令的一個指標。
  16. The compiler prearranges the bundles so the vliw chip can quickly execute the instructions in parallel, freeing the microprocessor from having to perform the complex and continual runtime analysis that superscalar risc and cisc chips must do

    編譯器預先安排好這種捆綁，因而vliw能快速地平行處理指令，免去了微處理器不得不執行復雜和連續的運行時間分析，而超級標量risc和cisc晶元必須做這種分析。
  17. Optimization when compiling six approaches are proposed : constant embedding, constant propagation, duplication propagation, flag update elimination, conditional instruction merge and instruction scheduling

    編譯期優化提出六種編譯期優化的手段:只讀常量內嵌，常量傳播，復制傳播，消除無用標志位更新，條件語句合併和指令重排。
  18. Our products attained to the standard of gb t5237 - 2000 in june of 2000, certified by the china certification committee for quality mark and certi - ficate of conformity of quality system certification iso 9002, and also awarded as enterprise with reliable quality by the national concerned department

    2000年6月通過產品質量方圓標志認證和iso9002質量體系認證。並通過sgs公司的測試報告，本公司的產品均符合歐盟環保rosh指令性要求。
  19. This paper presents the yh ts - 1 instruction architecture, which based on the vector expansion of arm v4 instruction architecture. it supports vector processing and scalar processing in the same instruction set

    本文提出了基於armv4指令集體系結構擴展的銀河ts - 1指令集體系結構，在同一個指令集內同時支持標量機制和向量機制。
  20. However, c standard does not specify when, in an expression, the " set " portion of an increment instruction is executed

    然而， c #標準沒有指定何時執行表達式中的增量指令的「設置」部分。
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