語言信號功率 的英文怎麼說

中文拼音 [yánxìnháogōng]
語言信號功率 英文
speech signal power
  • : 語動詞[書面語] (告訴) tell; inform
  • : Ⅰ名詞1. (話) speech; word 2. (漢語的一個字) character; word 3. (姓氏) a surname Ⅱ動詞(說) say; talk; speak
  • : 號Ⅰ名1 (名稱) name 2 (別號; 字) assumed name; alternative name3 (商店) business house 4 (...
  • : 名詞1 (功勞) exploit; merit; meritorious service [deed]: 戰功 military exploits; 立功 render me...
  • : 率名詞(比值) rate; ratio; proportion
  • 語言 : language
  1. Above all, [ 12 : 8 ] harming error correction theory is mentioned in this paper. the edac circuit designed by vhdl can works normally at different frequency of the cpu clock such as 66mhz 50mhz 40mhz 33mhz. the edac function of the circuit can also be disabled by software tool. meanwhile, some basic devices such as and logic, or logic, not logic and some small scale integrated circuits are also integrated in the fpga

    本論文闡述了12 , 8漢明碼糾錯設計過程,採用vhdl實現糾錯編碼器( edac ) ,本設計能夠適應cpu時鐘clk2的不同頻,如66mhz 、 50mhz 、 40mhz 、 33mhz ,並且能夠通過軟體的控制使fpga的糾錯編碼能關閉。
  2. The viterbi decoder with hard decision designed by the paper, is aimed at ( 3, 1, 9 ) convolutional coding. the data rate is 9. 6kbps. the data rate received by the rake receiver is spreaded by 127 - bit spread sequences, added pilot signals and modulated by qpsk

    該課題所設計viterbi譯碼是針對( 3 , 1 , 9 )卷積碼的硬判決譯碼,數據速為9 . 6kbps ; rake接收機所接收的數據是擴頻因子為127 、加入導頻且經qpsk調制的擴頻,使用verilg硬體描述在xilinx公司的ise環境下在用現場可編程門陣列( fpga )來實現viterbi譯碼器和rake接=收機的能。
  3. First, an usb high - speed data acquisition card based on the labview platform was designed. conformed to usb 1. 1 protocol, it can support high - speed data transfer up to 12mb / s. the card was characteristic with anolog digit converting with high sample rate of 24ms / s and high - speed counter, belong to this, it can implement as common io

    本工作首先設計開發了以圖形化編程labview為應用程序開發平臺的usb高速數據採集處理系統,此卡採用usb1 . 1的總線介面協議,每秒傳輸速達12mb s ,最高采樣為24msps ,不僅能夠實現對模擬的高速採集,一般的輸入輸出( io )能,而且能夠實現高速的計數能。
分享友人